Boots – shoes – and leggings
Patent
1993-07-06
1995-09-05
Lee, Thomas C.
Boots, shoes, and leggings
395500, 364 162, 36492781, 36493461, 3649457, 3649613, G06F 104
Patent
active
054487170
ABSTRACT:
The invention provides a register, which when set to a specific value, ensures that memory accesses take at least a specified number of clock cycles. The invention specifically introduces delays into the memory accesses when a memory bank control register is configured to operate the memory bank in a fast-CAS (fast column address strobe) mode of operation. The delays are introduced transparent to the values in the memory bank control register that otherwise controls the operation of the memory bank. The delay introduced by the invention permits an in-circuit-emulation (ICE) system sufficient time to transfer trace data from the microprocessor to the ICE-base.
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Balmer Mark J.
Farrer Steven M.
Barry Lance Leonard
Intel Corporation
Lee Thomas C.
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