Transparent memory mapping mechanism for a digital signal proces

Details Transparent memory mapping mechanism for a digital signal proces Transparent memory mapping mechanism for a digital signal proces

1994-05-31

1996-11-05

Robertson, David L.

395474, 395481, G06F 1202

Patent

active

055726950

ABSTRACT:
A digital signal processing system includes first and second logical memory mapping units coupled to first and second digital processors respectively and to a data storage unit. The system further includes first and second mapping registers for containing first and second address mapping information coupled to the first and second digital processors respectively. The first and second mapping units are operative to receive (i) first and second logical addresses generated by the first and second digital processors respectively and (ii) first and second address mapping information respectively, and generate first and second physical addresses such that each of the digital processors can independently access any of a plurality of memory locations within the data storage unit.

REFERENCES:
patent: 4827406 (1989-05-01), Bischoff et al.
patent: 4991169 (1991-02-01), Davis et al.
patent: 5010476 (1991-04-01), Davis

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