Transmitter/receiver for generating transmitting data signal in

Multiplex communications – Wide area network – Packet switching

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370108, 375109, 34082514, H04J 306

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active

051484307

ABSTRACT:
A transmitter/receiver applicable as an interface circuit in ISDN terminals is disclosed. In externally designated total phase deviation measurement mode, the delay time caused by a receiver circuit and a driver circuit, i.e. a phase difference, is predetected by a phase comparator. The detected phase difference signal is stored in a phase control circuit, and the phase control circuit controls the pahse of a periodical timing signal generated from a PLL circuit. Therefore, as a data buffer applies a transmitting data to the driver circuit 7 in response to the phase control timing signal, the phase difference of the transmitting data signal generated from the driver circuit relative to the received data signal is made to be the minimum.

REFERENCES:
patent: 3509471 (1970-04-01), Puente
patent: 3639838 (1972-02-01), Kuhn et al.
patent: 4604582 (1986-08-01), Strenkowski et al.
patent: 4941141 (1990-07-01), Hayano
Kondo, "Development for ISDN's Interface LSI", EIC Technical Study Report, vol. 89, No. 204 Sep. 21, 1989, pp. 29-30.
International Telegraph and Telephone Consultative Committee, Study Group XVIII-Report-R 21(C), Jul. 1986.

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