Electrical computers and digital processing systems: processing – Processing architecture – Array processor
Patent
1996-09-12
1999-11-23
An, Meng-Ai T.
Electrical computers and digital processing systems: processing
Processing architecture
Array processor
712 18, 712 32, 712 33, 712 39, 712225, 712229, 370230, 370232, 370390, 370395, 370414, 370413, 709230, 709234, G06F 900
Patent
active
059918675
ABSTRACT:
A transmit scheduler and method of operation are provided for an asynchronous transfer mode network. The transmit scheduler is operable to write data to and read data from a scheduler table and a virtual channel identifier ("VCI") table in order to schedule cells for virtual channels. The transmit scheduler calculates a location in the scheduler table in which to schedule a cell for a current virtual channel and determines whether a cell for a prior virtual channel is scheduled in the calculated location in the scheduler table. The transmit scheduler then schedules the cell for the current virtual channel at the calculated location in the scheduler table. If a cell for a prior virtual channel was scheduled in the calculated location in the scheduler table, the transmit scheduler writes a pointer into a next pointer field of a record for the current virtual channel in the VCI table, where the pointer provides a link to a record for the prior virtual channel in the VCI table. The transmit scheduler is thereby operable to build linked lists beginning at each location in the scheduler table in which cells for more than one virtual channel are calculated to be scheduled.
REFERENCES:
patent: 5231631 (1993-07-01), Buhrke et al.
patent: 5274768 (1993-12-01), Traw et al.
patent: 5280476 (1994-01-01), Kojima et al.
patent: 5311509 (1994-05-01), Heddes et al.
patent: 5379297 (1995-01-01), Glover et al.
patent: 5381411 (1995-01-01), Ohno et al.
patent: 5414707 (1995-05-01), Johnston et al.
patent: 5420858 (1995-05-01), Marshall et al.
patent: 5430721 (1995-07-01), Dumas et al.
patent: 5455826 (1995-10-01), Ozveren et al.
patent: 5490141 (1996-02-01), Lai et al.
patent: 5535197 (1996-07-01), Cotton
patent: 5548587 (1996-08-01), Bailey et al.
patent: 5557607 (1996-09-01), Holden
patent: 5568486 (1996-10-01), Huscroft et al.
patent: 5572522 (1996-11-01), Calamvokis et al.
patent: 5583861 (1996-12-01), Holden
patent: 5592476 (1997-01-01), Calamvokis et al.
patent: 5600650 (1997-02-01), Oskouy
patent: 5602853 (1997-02-01), Ben-Michael et al.
patent: 5617416 (1997-04-01), Damien
patent: 5625625 (1997-04-01), Oskouy et al.
patent: 5629937 (1997-05-01), Hayter et al.
patent: 5701292 (1997-12-01), Chiussi et al.
patent: 5726985 (1998-03-01), Daniel et al.
patent: 5742765 (1998-04-01), Wong et al.
patent: 5745477 (1998-04-01), Zeng et al.
patent: 5751709 (1998-05-01), Rathnavelu
patent: 5852655 (1998-12-01), McHale et al.
"Traffic Management Specification Version 4.0" (af-tm-0056.000), The ATM Forum Technical Committee, Apr. 1996, 107 pages.
"Universal Serial Bus Class Definitions for Communication Devices," Version 1.1, USB Implementers' Forum, Jan. 19, 1999, 110 pages.
"ATM over ADSL Recommendations," ADSL Forum Technical Report TR-002, Mar. 1997, 23 pages.
"Framing and Encapulations Standards for ADSL: Packet Mode," ADSL Forum WT-004 v3.0 Technical Report, Mar. 1997, 16 pages.
Daniel Minoli and Michael Vitella, "ATM Cell Relay Service for Corporate Environments," New York: McGraw-Hill, Inc., 1994.
An Meng-Ai T.
Efficient Networks, Inc.
Nguyen Dzung C.
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