Transmission system, receiver, and interconnection network

Multiplex communications – Pathfinding or routing – Switching a message which includes an address header

Reexamination Certificate

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C370S535000, C370S337000

Reexamination Certificate

active

06839357

ABSTRACT:
The invention provides a programmable network architecture for interconnecting several calculation modules in a receiver of a data transmission system with a very high data rate, which receiver comprises a forward and a return communication path. The architecture renders it possible to realize local communications between neighboring calculation modules and global communications between non-neighboring calculation modules. The network is formed by a sequence of programmable interconnection cells comprising memory means for storing the data which traverse between two non-neighboring modules which are present in the forward path and the return path, respectively. The role of these memories is to guarantee that the data pass through at most two successive multiplexers in one clock cycle, so that a high clock speed can be chosen.

REFERENCES:
patent: 5937202 (1999-08-01), Crosetto
patent: 6456628 (2002-09-01), Greim et al.
“A Survey of Interconnection Networks”, by Tse-yun Feng, IEEE 1981 pp. 12-27.

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