Transmission path structure for measuring propagation delay time

Electricity: measuring and testing – Impedance – admittance or other quantities representative of... – Parameter related to the reproduction or fidelity of a...

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Details

324533, 324765, G01R 2728, G01R 3126

Patent

active

058670300

ABSTRACT:
The present invention provides a simple circuit for measuring the delay time between a driver (DR) and a device under test (DUT), and the (DUT) and a comparator (CP) during the connection state of an I/O test where separate driver and comparator paths are used. In the connection circuit of the I/O test using two I/O common pins to connect to one of the pins of the DUT, a terminal pin of a DUT socket corresponding to the DUT pin is grounded. Furthermore, in the connection circuit of the I/O test using a DR-only pin and an I/O common pin to connect to the DUT pin, the terminal pin of the DUT socket is grounded and a standard comparator is employed.

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patent: 5471145 (1995-11-01), Mydill

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