Transmission of voice over an asynchronous network

Multiplex communications – Data flow congestion prevention or control – Control of data admission to the network

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Details

370395, 370474, H04L 1256, H04J 324, G04F 500

Patent

active

061187631

ABSTRACT:
An SCSA RX/TX memory (220) receives voice data and stores voice data samples under established voice channel identifiers. A controller (240) selects voice channels, and their associated voice data, for inclusion in an ATM cell. The memory (220) sends the voice channel identifier and the voice data for the selected channels to a Constant Bit Rate Segmentation And Reassembly (CBR SAR) circuit (225). The CBR SAR aggregates the voice data into an appropriate number of ATM cell slots for each of those voice channels. The CBR SAR 225 sends the aggregated information to a Multiplexer/Duplicator Circuit (MUX/DUP) (230) which assembles the ATM cell, and sends the completed ATM cell to an ATM transceiver (265) for transmission. When there is no voice data to be sent information data from an Available Bit Rate (ABR) SAR (260) is assembled to form an ATM cell to be sent by the ATM transceiver. The MUX/DUP also receives an ATM cell from the ATM transceiver, duplicates the ATM cell, sends one copy of the ATM cell to the CBR SAR, and one copy of the ATM cell to the ABR SAR. The SARs disassemble the ATM cell, verify the channel identifiers, and route any valid channel identifiers and associated data to their respective memories. The SCSA memory attaches a channel identifier number to each voice data sample and sends the combination to the SCSA interface, which then places the combination on the SCSA port (210). A host device causes the information data to be read from the DATA memory via PCI ports (245) via a DMA operation.

REFERENCES:
patent: 5432713 (1995-07-01), Takeo et al.
patent: 5502723 (1996-03-01), Sanders
patent: 5572521 (1996-11-01), Pauwels et al.
patent: 5712854 (1998-01-01), Dieudonne et al.
patent: 5768270 (1998-06-01), Ha-Duong

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