Transmission load control for multichannel HDLC TDM line

Details Transmission load control for multichannel HDLC TDM line Transmission load control for multichannel HDLC TDM line

1995-11-30

1998-02-24

Olms, Douglas W.

Multiplex communications

Data flow congestion prevention or control

Flow control of data transmission through a network

370522, H04J 314

Patent

active

057217262

ABSTRACT:
Output on Multiple Time Division Multiplexer (TDM) HDLC lines (28) is selectively and gracefully throttled. A throttling signal (99) is asserted whenever either the output FIFO queue (58) is almost full or the input FIFO queue (56) is almost empty. Whenever an in frame/out of frame state transition occurs for a given logical channel, a check is made whether throttling is required (292, 296). If throttling is required, an HDLC flag byte is transmitted (291, 299), delaying all such state transitions until the throttling signal (99) is no longer asserted.

REFERENCES:
patent: 4590468 (1986-05-01), Stieglitz
patent: 5502750 (1996-03-01), Co et al.
patent: 5602882 (1997-02-01), Co et al.
Published May 1995 by Motorola Inc., "MC68360 Quad Integrated Communications Controller User's Manual", pp. 1-1 -11-8.
Published Jul. 1995 by Motorola Inc., "MC68MH360 QUICC32 Quad Integrated Multichannel Controller Reference Manual", pp. 1-1 -8-4.

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