Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Current driver
Reexamination Certificate
2007-11-06
2007-11-06
Wells, Kenneth B. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Current driver
C327S112000, C327S170000
Reexamination Certificate
active
11443198
ABSTRACT:
A transmission line driver circuit that operates at a first voltage level is fabricated using devices that operate at a second, lower voltage level. The driver circuit includes a ramp generator that receives a speed signal and a data signal and generates a charge ramp signal and a discharge ramp signal. A pair of series connected source follower transistors have their gates connected to respective charge and discharge signal outputs of the ramp generator. The driver circuit output signal is generated at an output node between the sources of the NMOS and PMOS source follower transistors. A charge_ls generator circuit provides a charge_ls signal and a discharge_ls generator circuit provides a discharge_ls signal. A pair of protection transistors includes a first NMOS protection transistor and a first PMOS protection transistor, which are connected in series with respective ones of the source follower transistors, and their gates are connected to respective ones of the charge and discharge signals. The pair of protection transistors prevents the voltage across the NMOS and PMOS source follower transistors from exceeding their breakdown voltages.
REFERENCES:
patent: 4329600 (1982-05-01), Stewart
patent: 4857863 (1989-08-01), Ganger et al.
patent: 5179299 (1993-01-01), Tipon
patent: 5973534 (1999-10-01), Singh
patent: 5999034 (1999-12-01), Singh et al.
patent: 6057710 (2000-05-01), Singh
patent: 6236239 (2001-05-01), Kogushi
patent: 6271699 (2001-08-01), Dowlatabadi
patent: 6617897 (2003-09-01), Lee
patent: 7187197 (2007-03-01), Tripathi et al.
Lim, C.H., Output Buffer With Self-adjusting Slew Rate and On-Chip Compensation, Daasch, W.R. IEEE Symposium on IC/Package Design Integration, 1998. Proceedings. pp. 51-55, Feb. 2-3, 1998.
Choi, Seok-Woo and Park, Hong-June; A PVT-insensitive CMOS Output Driver with Constant Slew Rate, Proceedings of 2004 IEEE Asia Pacific Conference on Advanced System Integrated Circuits 2004., Aug. 4-5, 2004, pp. 116-119.
Tschanz, J.W et al., Adaptive body bias for reducing impacts of die-to-die and within-die parameter variations on microprocessor frequency and leakage. IEEE Journal of Solid-State Circuits, vol. 37, Issue 11 Nov. 2002. pp. 1396-1402.
Jung-Bae Lee et al.; Digitally-controlled DLL and I/O circuits for 500 Mb/s/pin×16 DDR SDRAM. Solid-State Circuits Conference, 2001, Digest of Technical Papers, ISSCC. 2001 IEEE International Feb. 5-7, 2001. pp. 68-69, 431.
Esch, G., Jr.; Chen, T.; Near-linear CMOS 1/0 driver with less sensitivity to process, voltage, and temperature variations. Very Large Scale Integration (VLSI) Systems, IEEE Transactions on vol. 12, Issue 11 Nov. 2004. pp. 1253-1257.
Chen, T.; Naffziger, S.; Comparison of adaptive body bias (ABB) and adaptive supply voltage (ASV) for improving delay and leakage under the presence of process variation, Very Large Scale Integration (VLSI) Systems, IEEE Transactions on vol. 11, Issue 5, Oct. 2003, pp. 888-899.
Soon-Seod Lee; Tae-Giem Lo,; Kae-Tack Yoo; Soo-Won Kim; Process-and-temperature compensated CMOS voltage-controlled oscillator for clock generators, Electronics Letters, vol. 39, Issue 21, Oct. 16, 2003, pp. 1484-1485.
Khan, Q.A.; Wadhwa, S.K.; Misri, K.; A tunable g/sub m/-C filter with low variation across process, voltage and temperature. VLSI Design, 2004. Proceedings 17thInternational Conference 2004, pp. 539-544.
Hua Chi; Stout, D.; Chickanosky, J.; Process, voltage and temperature compensation of off-chip-driver circuits for sub-0.25-?m CMOS technology, ASIC Conference and Exhibit, 1997, Proceedings, Tenth Annual IEEE International Sep. 7-10, 1997, pp. 279-282.
Dowlatabadi, Ahmad B., A Robust, Load-Insensitive Pad Driver, IEEE Journal of Solid State Circuits, vol. 35, No. 4, pp. 660-665, Apr. 1, 2000.
Hwang, Cherng Chow and Chen, Yi Huang, Novel Output Buffer Design for Universal Serial Bus Applications, The second IEEE Asia Pacific Conference on ASICS 2000, pp. 69-72, Aug. 28-30, 2000.
Khan Qadeer A.
Tripathi Divya
Bergere Charles
Freescale Semiconductor Inc.
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