Transmission components for processing VLAN tag and priority...

Multiplex communications – Data flow congestion prevention or control – Flow control of data transmission through a network

Reexamination Certificate

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Details

C370S412000, C370S468000

Reexamination Certificate

active

07136355

ABSTRACT:
A transmission component for processing priority packets supported by using a single chip's buffer structure. Packets of network data are divided into high priority packets and low priority packets. High priority packets in the component are sent first, followed by low priority packets in order to satisfy priority requirement. Moreover, packets are transmitted continuously without stopping to maintain packet transmission at high performance. Furthermore, the transmission component of the present invention is compatible with different kinds of chip structure, and therefore no hardware must be changed when applied to different kinds of chip structure.

REFERENCES:
patent: 6128666 (2000-10-01), Muller et al.
patent: 6335935 (2002-01-01), Kadambi et al.
patent: 6493318 (2002-12-01), Bare

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