Transmission circuit and reception circuit

Details Transmission circuit and reception circuit Transmission circuit and reception circuit

1999-02-05

2000-10-03

Williams, Howard L.

Coded data generation or conversion

Digital code to digital code converters

Substituting specified bit combinations for other prescribed...

341 51, H03M 700

Patent

active

061279501

ABSTRACT:
Image data is transmitted from a memory to a CPU (central processing unit). A transmission circuit of the memory receives an 8-bit source parallel signal, makes reference to transmission histories or to transmission predictions to generate a 2-bit coded parallel signal from the source parallel signal, and sends a serial signal as a result of converting the coded parallel signal, together with a flag signal indicative of the presence of an encoding. If the source parallel signal remains unchanged, the coded parallel signal is made to indicate 00 so that the bit transition probability of the serial signal is reduced. A reception circuit of the CPU receives the serial and flag signals and restores the 8-bit source parallel signal on the basis of reception histories or on the basis of reception predictions. If the transmission circuit fails in performing an encoding, then a serial signal as a result of directly converting the source parallel signal is sent together with a flag signal indicative of the absence of an encoding.

REFERENCES:
patent: 3976844 (1976-08-01), Betz
patent: 4796003 (1989-01-01), Bentley et al.
patent: 4899148 (1990-02-01), Sato et al.
patent: 5384568 (1995-01-01), Grinberg et al.
patent: 5475831 (1995-12-01), Yoshida et al.
patent: 5572736 (1996-11-01), Curran
patent: 5574921 (1996-11-01), Curan
patent: 5847666 (1998-12-01), Yasohima et al.

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