Translator for recessed flip-chip package

Details Translator for recessed flip-chip package Translator for recessed flip-chip package

1998-09-08

2000-12-12

Gaffin, Jeffrey

Electricity: electrical systems and devices

Housing or mounting assemblies with diverse electrical...

For electronic systems and devices

361772, 361774, 257723, 257776, 257777, 257778, 438108, H05K 710

Patent

active

061607150

ABSTRACT:
The specification describes a recessed chip IC package in which the IC chip is bonded to a translator, and power and ground planes for IC power and ground interconnections are formed on separate interconnect levels of the translator. The multilevel interconnection capability of the translator allows crossovers, and allows power and ground pins from the IC chip to be both isolated from signal I/Os, and consolidated into fewer interconnections going to the next board level. The translator also has a large area outboard of the IC chip area to allow fan out from high pin count chips to large pitch interconnection sites for interconnection to the next board level.

REFERENCES:
patent: 5490324 (1996-02-01), Newman
patent: 5796170 (1998-08-01), Marcantonio
patent: 5906042 (1999-05-01), Lan et al.

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