Translation block invalidation prehints in emulation of a...

Data processing: structural design – modeling – simulation – and em – Emulation – Of instruction

Reexamination Certificate

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C703S023000, C717S136000, C717S138000, C717S140000

Reexamination Certificate

active

07957952

ABSTRACT:
Emulation systems and method involving invalidating blocks of translated code in emulation of a target system on a host system in are disclosed. One or more blocks of target system code are translated by the host system to produce one or more corresponding blocks of translated code. The host system uses one or more native target system instructions as hints to invalidate or potentially invalidate one or more blocks of translated code. Blocks containing such hints cause the host system to mark some or all of the one or more blocks of translated code as potentially invalid. The potentially invalid blocks may be re-translated immediately. Alternatively, the potentially invalid blocks may be checked to see if the code in these blocks has been modified. If the code has been modified, corresponding blocks of target code may be re-translated.

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