Transistor with a germanium-based channel encased by a gate...

Details Transistor with a germanium-based channel encased by a gate... Transistor with a germanium-based channel encased by a gate...

2006-05-23

2010-11-09

Jackson, Jr., Jerome (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Heterojunction device

Field effect transistor

C257S194000, C257S256000, C257SE29140, C438S663000

Reexamination Certificate

active

07829916

ABSTRACT:
Source and drain electrodes are each formed by an alternation of first and second layers made from a germanium and silicon compound. The first layers have a germanium concentration comprised between 0% and 10% and the second layers have a germanium concentration comprised between 10% and 50%. At least one channel connects two second layers respectively of the source electrode and drain electrode. The method comprises etching of source and drain zones, connected by a narrow zone, in a stack of layers. Then superficial thermal oxidation of said stack is performed so a to oxidize the silicon of the germanium and silicon compound having a germanium concentration comprised between 10% and 50% and to condense the germanium Ge. The oxidized silicon of the narrow zone is removed and a gate dielectric and a gate are deposited on the condensed germanium of the narrow zone.

REFERENCES:
patent: 2003/0215989 (2003-11-01), Kim et al.
patent: 2004/0063286 (2004-04-01), Kim et al.
patent: 2005/0093021 (2005-05-01), Ouyang et al.
patent: 2006/0113524 (2006-06-01), Bill et al.
Lee S. et al., “A Novel Sub-50 nm Multi-Bridge-Channel MOSFET (MBCFET) with Extremely High Performance,” 2004, VLSI Technology, Digest of Technical Papers, pp. 200-201.
Yang F. et al., “5nm-Gate Nanowire FinFET,” 2004, VLSI Technology, Digest of Technical Papers, pp. 196-197.

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