Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons
Patent
1987-11-02
1989-02-07
Sikes, William L.
Electrical transmission or interconnection systems
Nonlinear reactor systems
Parametrons
307443, 307602, 307544, 307446, H03K 19003, H03K 19088, H03K 1760, H03K 1728
Patent
active
048033839
ABSTRACT:
A transistor-transistor logic circuit, i.e., TTL circuit includes at least one input terminal (IN; IN.sub.1, IN.sub.2), an output transistor (T10, T1), and elements (1, 2, T11, T12; 3, 4, T2) operatively connected between an input terminal and the base of an output transistor. The elements include a plurality of delay parts, each having a different signal propagation delay time respectively which feed base currents to the base of the output transistor in and at a different times. As a result, a quick change in the output is prevented and thus an overshoot, ringing or noise can be prevented, while realizing an increased driving ability. At the same time, optimum output characteristics can be obtained according to a load to be driven by the TTL circuit.
REFERENCES:
patent: 4581550 (1986-04-01), Ferris et al.
patent: 4661727 (1987-04-01), Ferris et al.
patent: 4697103 (1987-09-01), Ferris et al.
patent: 4698525 (1987-10-01), Tavana et al.
Bertelson David R.
Fujitsu Limited
Sikes William L.
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