Transistor structure for erasable and programmable semiconductor

Details Transistor structure for erasable and programmable semiconductor Transistor structure for erasable and programmable semiconductor

1994-07-13

1996-12-10

Clawson, Jr., Joseph E.

Static information storage and retrieval

Floating gate

Particular connection

36518509, 36518514, 36518518, G11C 1604

Patent

active

055838111

ABSTRACT:
A programmable EEPROM cell structure consisting in a split-gate structure in series with a coupling capacitor between the floating gate and an additional program gate in order to provide enhanced injection efficiency. The electron injection is controlled by a control gate at the source side. The area of the coupling capacitor is selected with a substantial coupling factor to a high voltage onto the floating gate during programming so as to produce hot-electron injection at the split point in the channel region between the control gate and the floating gate. Submicrosecond programming at a 5 V drain voltage can thereby be achieved.

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