Transistor-level timing and simulator and power analyzer

Details Transistor-level timing and simulator and power analyzer Transistor-level timing and simulator and power analyzer

1995-07-10

1996-09-03

Ramirez, Ellis B.

Boots, shoes, and leggings

364488, G06F 1700

Patent

active

055530087

ABSTRACT:
A method for accurately simulating the timing and power behavior of digital MOS circuits is provided. The method includes piece-wise linear modeling of transistors, dynamic and static construction of channel connected components, event driven simulation and current measuring capabilities for power supplies, grounds, and individual resistors and transistors.

REFERENCES:
patent: 5446676 (1995-08-01), Huang

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