Transistor having reduced hot carrier implantation

Details Transistor having reduced hot carrier implantation Transistor having reduced hot carrier implantation

1990-01-31

1997-10-21

Gonzalez, Frank

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

257240, 257288, 257368, 257333, H01L 2910

Patent

active

056799683

ABSTRACT:
A transistor having reduced hot carrier implantation is disclosed which is formed on an outer surface (12) of a semiconductor substrate (10). The transistor comprises a source region (22) and a drain region (24) which define there between a channel region (34). A gate insulator layer (14) insulates a gate conductor (16) from the channel region (34). A sidewall insulator body (20) is formed such that a thickened region of insulator separates an end of gate conductor (16) from a portion of channel region (34) proximate drain region (24). This thickened insulator reduces the local electric field in channel region (34) near drain region (24) and correspondingly reduces the implantation into gate insulator (14) of hot carriers generated from impact ionization.

REFERENCES:
patent: 3339128 (1967-08-01), Olmstead et al.
patent: 3719866 (1973-03-01), Naber et al.
patent: 4238758 (1980-12-01), Suzuki
patent: 4677739 (1987-07-01), Doering et al.
patent: 4866491 (1989-09-01), Solomon

Affiliated with

Also associated with

Rating

Transistor having reduced hot carrier implantation does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Transistor having reduced hot carrier implantation, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Transistor having reduced hot carrier implantation will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1008967