Transistor having cubic boron nitride layer

Details Transistor having cubic boron nitride layer Transistor having cubic boron nitride layer

1990-07-16

1992-08-25

James, Andrew J.

357 232, 357 237, H01L 29161

Patent

active

051423502

ABSTRACT:
A multilayer structure for use in forming a transistor which may be suitable for high temperature applications is provided. A single crystal silicon substrate has an overlaying layer of epitaxially grown cubic boron nitride in crystallographic registry with the silicon substrate. The cubic boron nitride is epitaxially grown using laser ablation techniques and provides an electrically resistive and thermally conductive barrier. An active layer of epitaxial silicon is then grown from the layer of cubic boron nitride, such that the overlaying layer of epitaxial silicon is in crystallographic registry with the layer of boron nitride which is in crystallographic registry with the underlying silicon substrate. Appropriately doped source and drain regions and a gate electrode are provided to form the transistor. A clean crystallographic lattice match between the cubic boron nitride and surrounding silicon is obtained, thereby minimizing any stresses due to a mismatch in lattice constants and permitting the overlaying silicon active layer to be extremely thin.

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