Transistor controlled thyristor memory device

Active solid-state devices (e.g. – transistors – solid-state diode – Regenerative type switching device – Combined with field effect transistor

Reexamination Certificate

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Details

C257S107000, C257S146000, C257SE27014, C257SE29170

Reexamination Certificate

active

07465965

ABSTRACT:
A semiconductor device including: a bulk semiconductor substrate; an access transistor; a thruster formed on the bulk semiconductor substrate connecting to the access transistor; an element separating region to separate the region for the access transistor and the region for the thruster from each other; and a wiring layer connecting one of the diffused layers of the access transistor and the cathode of the thruster together through a connecting hole, the impurity region at the anode side of the thruster being composed of a p-type impurity region, an n-type impurity region, p-type impurity region, and an n-type impurity region, which are formed sequentially in the depth wise direction, with the lowermost n-type impurity region receiving the same voltage as that applied to the anode at the time of data holding.

REFERENCES:
patent: 6229161 (2001-05-01), Nemati et al.
patent: 6790713 (2004-09-01), Horch
patent: 7042027 (2006-05-01), Bhattacharyya
patent: 2005/0098794 (2005-05-01), Quek et al.
patent: 2005/0148118 (2005-07-01), Zheng et al.
patent: 2006/0043411 (2006-03-01), Bhattacharyya
patent: 2007/0096203 (2007-05-01), Mouli
Fraid Nemati, et al., “A Novel Thyristor-based SRAM Cell (T-RAM) for High-Speed, Low-Voltage Giga-scale Memories”, 1999, IEDM Tech, pp. 283.

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