Transistor circuit for reducing gate leakage current in a JFET

Details Transistor circuit for reducing gate leakage current in a JFET Transistor circuit for reducing gate leakage current in a JFET

1981-08-25

1984-09-18

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307304, 307491, 307497, 307501, 323316, 330253, 330256, 330257, 330277, 330288, H03K 1716, H03K 17687, H03K 19094, H03K 19003

Patent

active

044726481

ABSTRACT:
A transistor circuit is provided comprising a primary JFET whose gate leakage current is required to be minimized, and a reference current generator means connected to the source of the primary JFET for deriving a drain-to-source current to be applied to the source of the primary JFET. The drain-to-source current has a value which forces the gate leakage current to be minimized. The reference current generator means comprises either a trimmed adjustable current source, a current source JFET, or a scaled reference source. These current devices are connected to the source of the primary JFET either directly or through a current mirror means to minimize the gate leakage current of the primary JFET.

REFERENCES:
patent: 2954486 (1960-09-01), Doucette et al.
patent: 4068254 (1978-01-01), Erdi
patent: 4126830 (1978-11-01), Schade, Jr.
patent: 4207537 (1980-01-01), Cave et al.
patent: 4216394 (1980-08-01), Leidich
Wen, "Design and Operation of a Floating Gate Amplifier", IEEE Journal of Solid State Circuits, vol. SC9, No. 6, pp. 410-414, Dec. 1974.
Watson, "Testing Gate-Leakage Current in FETs", Electronic Engineering, pp. 53-55, Jun. 1972.
Garverick et al., "An MOS Chip for Surface Impedance Measurement and Moisture Monitoring", International Electron Devices Meeting, Tech. Dig., pp. 685-688, Dec. 1980.

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