Transistor array substrate and display panel

Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...

Reexamination Certificate

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C257S208000, C257SE33055

Reexamination Certificate

active

07573068

ABSTRACT:
A transistor array substrate includes a plurality of driving transistors which are arrayed in a matrix on a substrate. The driving transistor has a gate, a source, a drain, and a gate insulating film inserted between the gate, and the source and drain. A plurality of signal lines are patterned together with the gates of the driving transistors and arrayed to run in a predetermined direction on the substrate. A plurality of supply lines are patterned together with the sources and drains of the driving transistors and arrayed to cross the signal lines via the gate insulating film. The supply line is electrically connected to one of the source and the drain of the driving transistor. A plurality of feed interconnections are formed on the supply lines along the supply lines, respectively.

REFERENCES:
patent: 6762564 (2004-07-01), Noguchi et al.
patent: 6864639 (2005-03-01), Ito
patent: 6933533 (2005-08-01), Yamazaki et al.
patent: 7317429 (2008-01-01), Shirasaki et al.
patent: 2004/0108978 (2004-06-01), Matsueda et al.
patent: 1360350 (2002-07-01), None
patent: 8-330600 (1996-12-01), None
patent: 2000-349298 (2000-12-01), None
patent: 2003-133079 (2003-05-01), None
patent: 2003-195810 (2003-07-01), None
patent: 2003-330387 (2003-11-01), None
patent: 2004-101948 (2004-04-01), None
patent: WO 2004/019314 (2004-03-01), None
A Japanese Office Action (and English translation thereof) dated Apr. 30, 2008, issued in a counterpart Japanese Application.

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