Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Reexamination Certificate
2005-06-16
2009-10-06
Nguyen, Ha Tran T (Department: 2829)
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
Of individual circuit component or element
C324S613000, C365S185240
Reexamination Certificate
active
07598764
ABSTRACT:
A transistor arrangement having a multiplicity of transistors interconnected with one another, having a noise detection device, which is set up for detecting the 1/f noise of at least one portion of the transistors, having a selection device, which is set up for selecting at least one of the transistors, on the basis of the ascertained 1/f noise characteristic of the transistors, in the case of which the 1/f noise is sufficiently low.
REFERENCES:
patent: 4908570 (1990-03-01), Gupta et al.
patent: 5612643 (1997-03-01), Hirayama
patent: 5805641 (1998-09-01), Patel
patent: 5929695 (1999-07-01), Chan et al.
patent: 5936460 (1999-08-01), Iravani
patent: 5970429 (1999-10-01), Martin
patent: 6191647 (2001-02-01), Tanaka et al.
patent: 6236224 (2001-05-01), Schneider
patent: 6249556 (2001-06-01), Rees et al.
patent: 6297682 (2001-10-01), Morishima
patent: 6417737 (2002-07-01), Moloudi et al.
patent: 6693439 (2004-02-01), Liu et al.
patent: 6850441 (2005-02-01), Mokhlesi et al.
patent: 7012468 (2006-03-01), Brederlow et al.
patent: 2002/0105308 (2002-08-01), Tsukagoshi et al.
patent: 101 17 362 (2002-10-01), None
patent: 101 17 362 (2002-10-01), None
patent: WO-02/082256 (2002-10-01), None
Ralf Brederlow et al.; “Influence of Fluorinated Gate Oxides on the Low Frequency Noise of MOS Transistors under Analog Operation”; In: Proceedings of the 28thEuropean Solid-State Device Research Conference, (1998), pp. 472-475.
Ralf Brederlow et al.; “Fluctuations of the Low Frequency Noise of MOS Transistors and their Modeling in Analog and RF-Circuits”; IEDM 1999 Tech. Dig., pp. 159-162.
S. Christensen et al.; “Low Frequency Noise in MOS Transistors - I Theory”; Solid-State Electronics, 1968, vol. 11, pp. 797-812.
Dickstein , Shapiro, LLP.
Infineon - Technologies AG
Nguyen Ha Tran T
Vazquez Arleen M
LandOfFree
Transistor arrangement does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Transistor arrangement, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Transistor arrangement will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4120005