Transistor and semiconductor memory using the same

Details Transistor and semiconductor memory using the same Transistor and semiconductor memory using the same

2005-09-13

2005-09-13

Phung, Anh (Department: 2824)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185300, C257S321000, C438S257000

Reexamination Certificate

active

06944062

ABSTRACT:
A transistor includes p-type semiconductor (12) including a projection (13a) having a pair of side walls (13b, 13b) facing each other, a gate insulation layer (15c), a pair of n-type source/drain regions (BL1, BL2), tunnel insulation layers (15a), a pair of floating gates (FG1, FG2), inter-polycrystalline insulation layers, and a control gate (CG). The root portion of the projection (13A), which virtually connects the source/drain regions (BL1, BL2) with a straight line, is higher in the concentration of the p-type impurity than the other portion. A delete voltage for deleting charges stored in the floating gate (FG) is applied between the control gate (CG) and the source/drain region (BL1, BL2), so that a delete current flows toward the control gate (CG) or the source/drain region (BL1, BL2), the charges stored being deleted.

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Paper No. 29p-YC4, the 48thJoint Meeting of Engineering of Applied Physics of Japan. p88.

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