Transistor amplifier model and circuit analysis methods

Details Transistor amplifier model and circuit analysis methods Transistor amplifier model and circuit analysis methods

1998-02-18

2002-04-16

Choi, Kyle (Department: 2163)

Data processing: structural design, modeling, simulation, and em

Simulating electronic device or electrical system

Circuit simulation

C703S018000, C703S002000

Reexamination Certificate

active

06374204

ABSTRACT:

COMPUTER PROGRAM LISTING APPENDIX
The present application includes a computer program listing appendix comprising a total of 2 compact disks each containing identical copies of the programs which are included herewith. The computer program listing appendix has the following files which are hereby incorporated by reference:
Algl.c
44KB C
File
6/3/97 11:50 AM
Build_cl
1KB
File
6/3/97 11:59 AM
Dcomplex.c
4KB C
File
6/3/97 11:57 AM
Dcomplex.h
1KB H
File
6/3/97 11:57 AM
Fft4f.c
26KB C
File
6/3/97 11:53 AM
Fft4f.h
1KB H
File
6/3/97 11:54 AM
Ffz.c
2KB C
File
6/3/97 11:54 AM
Ffz.h
1KB H
File
6/3/97 11:54 AM
M_inv0d.c
8KB C
File
6/3/97 11:55 AM
M_inv0d.h
1KB H
File
6/3/97 11:55 AM
Nrutil.c
5KB C
File
6/3/97 11:55 AM
Nrutil.h
4KB H
File
6/3/97 11:55 AM
Read_one.c
2KB C
File
6/3/97 11:55 AM
Read_one.h
1KB H
File
6/3/97 11:56 AM
Read_two.c
3KB C
File
6/3/97 11:56 AM
Read_two.h
1KB H
File
6/3/97 11:56 AM
Write_on.c
2KB C
File
6/3/97 11:57 AM
Write_on.h
1KB H
File
6/3/97 11:57 AM
Wtcz.c
2KB C
File
6/3/97 11:54 AM
Wtcz.h
1KB H
File
6/3/97 11:54 AM
Alg2.c
190 KBC
File
6/3/97 12:02 PM
Alg3.c
201 KBC
File
6/3/97 12:03 PM
BACKGROUND OF THE INVENTION
(a) Field of the Invention
The present invention pertains to high power transistor amplifiers and, more particularly, to a transistor model and circuit analysis methods therefor.
(b) Description of Related Art
Communication systems utilize a wide range of transmission equipment for establishing communication links. Specifically, most communication systems utilize power amplifiers to boost a signal to an acceptable power level for transmission. Often these amplifiers are based on discrete semiconductor components such as transistors.
The design of high power transistor amplifiers is often simulation-based. Simulation packages can be used to calculate transistor output voltage and current (e.g., drain voltage and drain current). The calculation of output voltages and currents makes it possible to determine a wide variety of other circuit characteristics such as circuit gain, frequency response, and efficiency The use of simulation packages allows designers to test their designs without physically constructing them, thereby saving material cost and the designer's time. Currently, many software packages are available for simulating transistor amplifier circuit operation. These simulation packages are typically based on detailed transistor models such as the Pi parameter model or the Curtis model, which are very detailed and require the specification of many parameters for their use. Due to the complexity of these models, the simulation speeds of software packages using these models are relatively slow. Furthermore, it is difficult for a circuit designer using simulations to gain insight into the amplifier's operation because these models are very complex. That is, it is difficult for the designer to see how design changes alter circuit performance.
The need for a simple transistor model and methods for determining the output characteristics of a transistor can be readily appreciated. Such a model and its associated methods would allow the designer to quickly simulate amplifier designs. A simple model with simulation methods would also provide the designer with a sense of how design changes directly effect circuit performance.
SUMMARY OF THE INVENTION
A unique transistor model and methods for analyzing the model are disclosed. The transistor model of the present invention is simple and requires specification of a minimal number of parameters to determine the output characteristics of a transistor. Three analysis methods are disclosed, each having unique circumstances for application. A first method is premised on sampling all waveforms in the circuit and using the sampled information to determine the output of the transistor. The first method assumes an arbitrary periodic input waveform. The first method is very flexible and may be used with a wide range of models other than the disclosed model. A second and a third method are premised on input and output waveform clipping. The second method, which is computationally efficient, assumes a single tone input into the transistor. The third method is a combination of features from the first and second methods. That is, the third method is computationally efficient and assumes an arbitrary periodic input waveform.
A method for performing analysis of a non-linear circuit having known circuit characteristics and a known circuit input value is disclosed. The method includes the steps of generating an output value estimate; calculating an initial output value based on the circuit characteristics, the input value and the output value estimate; calculating a convergence factor based on a difference between the output value estimate and the initial output value; testing the convergence factor to determine whether the output value estimate and the initial output value have converged; generating a recursion factor that is used to update the output value estimate; and substituting the updated output value estimate for the output value estimate. The steps of the method are iterated until the output value estimate and the initial output value are sufficiently similar.
The present invention may also be embodied in a processor having an input port for accepting input data and an output port for providing output data. The processor may be programmed to perform analysis of a non-linear circuit having known circuit characteristics and a known circuit input value. The processor includes means for generating an output value estimate; means for calculating an initial output value based on the circuit characteristics, the input value and the output value estimate; means for calculating a convergence factor based on a difference between the output value estimate and the initial output value; means for testing the convergence factor to determine whether the output value estimate and the initial output value have converged; and means for generating a recursion factor. The processor may also include means for updating the output value estimate using the recursion factor; and means for substituting the updated output value estimate for the output value estimate.
In an alternate embodiment the processor be programmed to generate a first estimate of times at which the transistor changes from a first operating region to a second operating region. The processor may also calculate times at which the transistor changes from the second operating region to the first operating region. The processor may compute an intermediate value based on the first estimate of times and a second estimate or the times, using the intermediate value. The processor may be further programmed to compare the first estimate to the second estimate to determine whether the estimates have converged and replace the first estimate with the second estimate. The processor may be programmed to iterate the disclosed functionality until the first estimate and the second estimate converge. After convergence is reached the processor may generate an output result based on the intermediate value.
Also disclosed is a method for modeling a transistor including the step of representing a drain current as a linear component, a step function, and a scaling factor.
The invention itself, together with further objects and attendant advantages, will best be understood by reference to the following detailed description, taken in conjunction with the accompanying drawings.


REFERENCES:
patent: 4791593 (1988-12-01), Hennion
patent: 4918643 (1990-04-01), Wong
patent: 5047971 (1991-09-01), Horwitz
patent: 5687355 (1997-11-01), Joardar et al.
Yeager et al., “Improvement in norm-reducing Newton methods for circuit simulation,” Computer Aided Design of Integrated Circuits and Systems, IEEE Transaction, vol. 8, No. 5, 1989, pp. 538-546.*
Trajkovic et al., “Finding DC operating points of transistor circuits using homotopy methods,” Circuits and Systems, IEEE Int. Symp., 1991, pp. 758-761.

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