Transistor

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Details

357 51, 357 86, H01L 2972, H01L 2908

Patent

active

048355887

DESCRIPTION:

BRIEF SUMMARY
BACKGROUND OF THE INVENTION

This invention relates to a transistor, and more particularly to a structure of a high output power transistor comprised of a plurality of transistor units formed on a single semiconductor substrate and connected in parallel with each other, each of the transistor units having a stabilizing resistor inserted in the emitter circuit thereof.
To improve characteristics in the high frequency range and yet obtain a higher output power, there have been developed and put into practical use, various transistors which comprise a plurality of transistor units formed on a single semiconductor substrate and connected in parallel to each other, such as overlay transistors, meshemitter transistors, ring-emitter transistors and emitter-ballast transistors. In the transistors of these types, however, all transistor units comprising a transistor do not always have equal electrical characteristics. It will, therefore, be appreciated that, when the transistor units connected in parallel to each other are placed in operation, some of the units may be subjected to overload, causing a secondary breakdown thereof. To prevent such secondary breakdown, stabilizing resistors are inserted in respective emitter circuits of the transistor units in the transistors of the aforementioned types, to effect negative feedback operation in the respective transistor unit circuit, so that the load applied to the transistor units will be uniform.
Various methods have been heretofore proposed for inserting the stabilizing resistor into the emitter circuit of the transistor unit. In a first method, a resistive material (e.g. a metal such as a Nichrome (Ni-Cr), polycrystalline semiconductor, etc.) is deposited in a desired thickness at an electrode window formed on an insulation layer covering the surface of the emitter region of the transistor unit. Then, an electrode is provided at one end of the deposited resistive material, so that a stabilizing resistor is inserted into the emitter circuit. In this case, if a desired resistance value cannot be attained by the stabilizing resistor formed by depositing the resistive material in the electrode window, the resistive material may be deposited so that it extends along the insulation layer.
Another method is such that, when emitter regions are formed in a base region, additional diffused regions, of the same conductivity type as that of the emitter regions, are formed simultaneously within the base region in a predetermined shape, and the diffused regions act as stabilizing resistor regions. These resistor regions may also be formed in a separate step from the step for forming the emitter regions. In case the stabilizing resistors are formed in accordance with this method, each of the diffused resistor regions may be so disposed that it may be in contact at one of its ends with a corresponding emitter region and connected at its other end to an electrode wire; or it may be isolated from the corresponding emitter region and connected at one of its ends to the emitter region through an electrode wire and at its other end to another electrode wire.
The above-mentioned previously proposed methods, however, involve such disadvantages as the number of steps for fabrication is increased, it is difficult to provide a device of excellent electrical properties and it is quite difficult to increase the integration density of transistor units. That is, in the former method, the number of fabrication steps is increased because steps are required for depositing and patterning the resistive material. In addition, where the number of the emitter regions is increased to obtain a higher output power, it becomes difficult to effect patterning because the area of each individual emitter region is reduced. Therefore, if the number of emitter regions is increased, it is difficult to increase the integration density and the chip size of the semiconductor device will be increased. Furthermore, the method in which a resistor is deposited using a suitable resistive material has not been reduced to

REFERENCES:
patent: 3358197 (1967-12-01), Scarlett
patent: 3427511 (1969-02-01), Rosenzweig
patent: 3504239 (1970-03-01), Johnson et al.
patent: 3519898 (1970-07-01), Nakatani
patent: 3740621 (1973-06-01), Carley
patent: 4151542 (1979-04-01), Yajima et al.
patent: 4157561 (1979-06-01), Nawata et al.
patent: 4266236 (1981-05-01), Ueda
RCA Power Transistors (technical series PM 81, published by RCA, Somerville, J.J., 1971), pp. 23--33.

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