Transient suppression semiconductor device

Details Transient suppression semiconductor device Transient suppression semiconductor device

2008-06-20

2009-08-11

Ngo, Ngan (Department: 2893)

Active solid-state devices (e.g., transistors, solid-state diode

Heterojunction device

Bipolar transistor

C257S197000, C257S361000, C257S362000, C257SE29033

Reexamination Certificate

active

07573080

ABSTRACT:
The HBT-based transient suppression device contains a collector layer of a first conduction type, a base layer of a second conduction type, an emitter layer of the first conduction type, stacked in this order sequentially on a top side of a heavily doped substrate of the first conduction type. The doping concentration of the base layer is higher than that of the emitter and collector layers, and that the thickness of the collector layer is less than 300 nm, so that the BVCEObreakdown voltage is reduced below 5V Additionally, the thickness of the base layer is larger than the sum of the thickness of a section of the emitter-base depletion region extending into the base layer and the thickness of a section of the base-collector depletion region extending into the base layer, so that the base layer is not operated in a punch-through condition.

REFERENCES:
patent: 6600178 (2003-07-01), Washio et al.
patent: RE38608 (2004-10-01), Yu et al.
patent: 6809400 (2004-10-01), Harmon et al.
patent: 6974977 (2005-12-01), Washio et al.
patent: 2001/0048120 (2001-12-01), Shimawaki
patent: 2003/0141518 (2003-07-01), Yokogawa et al.
patent: 2006/0118822 (2006-06-01), Murata et al.
patent: 2006/0220165 (2006-10-01), Hase

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