Coded data generation or conversion – Analog to or from digital conversion – Digital to analog conversion
Reexamination Certificate
2001-04-02
2003-03-25
Williams, Howard L. (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Digital to analog conversion
C327S384000, C330S265000
Reexamination Certificate
active
06538590
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates in general to digital to analogue converters (DAC), and in particular to suppression of transient noise at turn-on of an audio power DAC.
2. Description of the Related Art
Class D audio power amplifiers (APAs) have been used for many years in systems, such as wireline telephony, where high bandwidth is not critical. More recently however, new fabrication techniques, and in particular, new techniques for fabricating power transistors, have made integrated class D APAs possible. This has extended their potential applications to lower-power, higher-bandwidth systems, including battery-powered portable music players and wireless communications devices.
One major advantage of class D amplifiers is their efficiency. Generally, an audio signal is converted into a relatively high frequency stream of pulses varying in width with the amplitude of the audio signal. This pulse width modulated (PWM) signal is used to switch a set of power output transistors between cutoff and saturation which results in efficiencies above ninety percent (90%). In contrast, the typical class AB push-pull amplifier, using output transistors whose conduction varies linearly during each half-cycle, has an efficiency of around sixty percent (60%). The increased efficiency of class D amplifiers in turn reduces power consumption and consequently lowers heat dissipation and improves battery life in portable systems.
As previously described, in a class D amplifier, efficiency is gained by switching the power devices hard between the power supply rails. The high frequency noise is then filtered with a low pass filter. Typically, the low pass filter is of the passive type, including inductive and/or capacitive reactive elements to smooth the signal.
FIG. 1
illustrates, in block diagram form, a typical class D amplifier system
100
. Amplifier system
100
includes class D amplifier
102
containing MOSFET switch
104
and delta-sigma (&Dgr;&Sgr;) converter/PWM controller
106
receives a digitized audio input signal, which constitutes the signal to be amplified. The digital input signal may be high resolution, low data rate data, which may be converted to low resolution, high data rate data by delta-sigma converter portion of delta-sigma converter/PWM
106
. (For example, the digital input signal may be 24-bit, 44 kHz data while the PWM data may be 5-bit, 1.1 MHz data.) MOSFET switch
104
may constitute a full bridge amplifier.
The PWM drives a signal onto an input of MOSFET switch
104
. The duty cycle of the PWM signal is proportional to the (quantized) amplitude of the audio signal. In other words, for each sample period, the relative time duration of the “high” and “low” levels of the PWM signal into MOSFET switch
104
are proportional to the quantized amplitude of the audio signal, and consequently the relative time intervals during which the output of the amplifier, ahead of LPF
110
, is pulled up and pulled down is similarly proportional to the audio signal amplitude. (PWM signal generation techniques are discussed in the commonly owned U.S. Pat. No. 5,815,102 to Melanson, entitled “Delta-sigma PWM DAC to Reduce Switching,” incorporated herein by reference.) The amplified audio is recovered via low pass filter (LPF)
110
, which provides the audio output to an audio transducer
124
, which may be, for example a speaker or headphones. LPF
110
may be AC coupled to switch
104
through coupling capacitor
108
. When system
100
is turned on, coupling capacitor
108
must be charged. During the transient charging of capacitor
108
, an audible signal may be produced. This may be perceived as an audible “pop” in transducer
124
. Alternatively, DACs using a ramp to charge capacitor
108
, may produce audible “rushing” noise in transducer
124
resulting from instability of delta-sigma converter/PWM
106
. Thus there is a need for circuits and methods for reducing the audible transient noise in a DAC system having a PWIM drive.
SUMMARY OF THE INVENTION
According to the principles of the present invention, a system is disclosed having a digital signal source and a switched-mode amplifier for amplifying a signal in response to the digital signal source. The system also contains a first complementary metal oxide semiconductor field effect transistor (MOSFET) pair having a common node serially coupled through a resistor to an output node of the amplifier. The first MOSFET pair is configured to receive an input signal, the input signal driving a ramp on the output node of the amplifier.
The inventive concept addresses a problem in systems having switched-mode amplifiers, namely, a transient noise caused at start-up of the system. In accordance with the inventive principles, a ramp is driven on the output node of the amplifier through a series resistor using a complementary MOSFET pair included in the amplifier, such that the transient noise is reduced by the voltage division across the resistor.
REFERENCES:
patent: 5043729 (1991-08-01), Fujimoto
patent: 5371420 (1994-12-01), Nakao
patent: 5877647 (1999-03-01), Vajapey et al.
patent: 6225844 (2001-05-01), Fujiwara
Fei Xiaofan
Gaboriau Johann Guy
Melanson John Laurence
Walburger Eric
Cirrus Logic Inc.
Newberger Barry S.
Rutkowski Peter
Williams Howard L.
Winstead Sechrest & Minick P.C.
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