Transflective LCD device and method of fabricating the same

Details Transflective LCD device and method of fabricating the same Transflective LCD device and method of fabricating the same

2001-06-11

2003-11-04

Ton, Toan (Department: 2871)

Liquid crystal cells, elements and systems

Particular structure

Having significant detail of cell structure only

C349S043000

Reexamination Certificate

active

06642979

ABSTRACT:

This application claims the benefit of Korean patent application No. 2000-32247, filed Jun. 12, 2000 in Korea, which is hereby incorporated by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a liquid crystal display device, and more particularly to a transflective liquid crystal display (LCD) device implementing selectable reflective and transmissive modes.
2. Discussion of the Related Art
Generally, a transflective LCD device has advantages of both a transmissive LCD device and a reflective LCD device. Because the transflective LCD device uses a back light as well as an ambient light source, it is not dependent upon exterior light source conditions, and consumes relatively low power.
FIG. 1
is an exploded perspective view illustrating a typical transflective LCD device. The transflective LCD device
11
includes an upper substrate
15
and a lower substrate
21
that are opposed to each other, and a liquid crystal layer
23
interposed therebetween. The upper substrate
15
and the lower substrate
21
are called a color filter substrate and an array substrate, respectively. On the upper substrate
15
, a black matrix
16
and a color filter layer
17
including a plurality of red (R), green (G), and blue (B) color filters are formed. The black matrix
16
surrounds each color filter such that an array matrix feature is formed. Further on the upper substrate
15
, a common electrode
13
is formed to cover the color filter layer
17
and the black matrix
16
.
On the lower substrate
21
opposing the upper substrate
15
, a thin film transistor (TFT) “T”, as a switching element, is formed in shape of an array matrix corresponding to the color filter layer
17
. In addition, a plurality of crossing gate and data lines
25
and
27
are positioned such that each TFT “T” is located near each crossing portion of the gate and data lines
25
and
27
. The crossing gate and data lines define a pixel region “P”. On the pixel region “P”, a pixel electrode
19
is formed. The pixel electrode
19
includes a transmissive portion “A” and a reflective portion “C”.
FIG. 2
is a cross-sectional view illustrating operation modes of the typical transflective LCD device
1
. As shown, the transflective LCD device
11
includes the upper substrate
15
having the common electrode
13
, the lower substrate
21
having the pixel electrode
19
, the liquid crystal layer
23
interposed therebetween, and a back light
41
disposed below the lower substrate
21
. The pixel electrode
19
includes a reflective electrode
19
b
having a through-hole “A” and a transparent electrode
19
a
positioned below the reflective electrode
19
b
. The transparent electrode
19
a
is separated from the reflective electrode
19
b
by a passivation layer
71
interposed therebetween.
For a reflective mode, the transflective LCD device
11
uses a first ray “B” of ambient light, which may radiate from an exterior natural light source or from an exterior artificial light source. The first ray “B” passes through the upper substrate
15
and is reflected by the reflective electrode
19
b
back through the liquid crystal layer
23
, which is aligned by the application of an electric field between the reflective electrode
19
b
and the common electrode
13
. Accordingly, the aligned liquid crystal layer
23
controls the first ray “B” so as to display an image.
For a transmissive mode, the transflective LCD device
11
uses a second ray “F” of light, which radiates from the back light
41
. The second ray “F” sequentially passes through both the transparent
19
a
and reflective
19
b
electrodes and the liquid crystal layer
23
which is aligned by the application of an electric field between the transparent electrode
19
a
and the common electrode
13
. Accordingly, the aligned liquid crystal layer
23
controls the second ray “F” so as to display an image.
FIG. 3
is an expanded plan view illustrating a portion of an array substrate for a conventional transflective LCD device. As shown in
FIG. 3
, a gate line
25
is arranged in a transverse direction, and a data line
27
, arranged perpendicular to the gate line
25
, are both formed upon an array substrate
21
(in FIG.
1
). A thin film transistor (TFT) “T” is arranged at a position where both the gate line
25
and the data line
27
cross one another. A pixel electrode
19
comprises both a transparent electrode
19
a
and a reflective electrode
19
b
is disposed on a pixel region “P” defined by the gate line
25
and data line
27
. The TFT “T” includes a gate electrode
61
to which a scanning signal is applied, a source electrode
63
to which a video signal is applied, and a drain electrode
65
which inputs the video signal to the pixel electrode
19
. A gate pad
26
and a source pad
28
are respectively disposed at end portions of the gate line
25
and data line
27
. The gate pad
26
and the source pad
28
are to be electrically connected with a drive IC (not shown).
Still referring to
FIG. 3
, the pixel electrode
19
is a transflective electrode having both the transparent electrode
19
a
and the reflective electrode
19
b
. Specifically, the transparent electrode
19
a
is first formed on the pixel region “P”, and is electrically connected with the drain electrode
65
via a first drain contact hole
67
. Then, the reflective electrode
19
b
is formed over the transparent electrode
19
a
. The reflective electrode
19
b
is also electrically connected with the drain electrode
65
via the transparent electrode
19
a
. Thus, the reflective electrode
19
b
has a through hole “A” corresponding to a transmissive portion of the LCD device
11
such that rays of back light
41
(in
FIG. 2
) can pass through the through hole “A” for function in the transmissive mode. Portion “C” of the reflective electrode
19
b
serves as a reflective portion of the LCD device
11
such that rays of the ambient light are thereby reflected.
With reference to
FIGS. 4A
to
4
F, a fabrication process for the array substrate is explained.
FIGS. 4A
to
4
F are sequential cross-sectional views taken along first to third lines “III—III”, “IV—IV”, and “V—V” of FIG.
3
.
At first, as shown in
FIG. 4A
, a first metal is deposited and patterned on the transparent array substrate
11
such that a gate pad
26
, a gate line
25
(in FIG.
3
), and a gate electrode
61
are formed. The gate line extends from the gate pad
26
, and the gate electrode
61
protrudes from the gate line
25
(in FIG.
3
). Thereafter, a gate-insulating layer
62
and a silicon layer
64
are sequentially formed upon the first metal. The silicon layer
64
comprises an amorphous silicon layer
64
a
and a doped amorphous silicon layer
64
b.
Next, as shown in
FIG. 4B
, the silicon layer
64
(in
FIG. 4A
) is patterned such that an active layer
66
a
and an ohmic contact layer
66
b
are formed to have an island-shaped structure positioned above the gate electrode
61
. Thereafter, as shown in
FIG. 4C
, a second metal is deposited over the island-shaped structure and is subsequently patterned such that a source pad
28
(in FIG.
3
), a plurality of data lines
27
, a source electrode
63
, and a drain electrode
65
are formed. The data line
27
crosses the gate line
25
(in
FIG. 3
) with the source pad
28
(in
FIG. 3
) being disposed at one end of the data line
27
. The source electrode
63
protrudes from the data line
27
, and the drain electrode
65
is spaced apart from the source electrode
63
.
Thereafter, an exposed portion of the ohmic contact layer
66
b
is etched away between the source electrode
63
and the drain electrode
65
, and a first passivation layer
71
is formed on the overall surface where the source electrode
63
and the drain electrode
65
are formed. The first passivation layer
71
has formed therein a first drain contact hole
67
positioned over the drain electrode
65
, a first gate pad contact hole
32
positioned over the gate pad
26
, and a first source pad contact hole
37
(in
FIG. 3
) po

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