Multiplex communications – Wide area network – Packet switching
Patent
1989-04-28
1991-09-17
Safourek, Benedict V.
Multiplex communications
Wide area network
Packet switching
370 61, 370 82, 370 951, 34082504, 34082552, H04J 324, H04Q 1104, H04L 1254
Patent
active
050501666
DESCRIPTION:
BRIEF SUMMARY
This invention relates to a transfer of messages in a multiplexed system.
More particularly, the invention relates to a method for the transfer of messages in a time multiplexed slotted environment such as a communications network. The network can be of the type disclosed in International Publication No. WO 86/03639 and that disclosure is incorporated herein by cross-reference.
Generally speaking, the invention provides an efficient method for the connectionless or connection oriented transfer of messages of arbitrary but finite length in a time multiplexed slotted environment with constrained destination resources.
The method provides for the efficient support of any type of addressing (short or extended, hierarchical or non-hierarchical) in the one environment, even in a system with short slots.
In the one environment, the method can guarantee delivery of messages or provide a more efficient transfer at the expense of occasional message loss. In either case, there are minimal communication overheads and the utilisation of destination resources is maximised. Thus the method provides a wide range of options and considerable scope for achieving a range of performance-cost objectives.
BACKGROUND ART
In the data communications environment, information is generally exchanged in units called packets. These consist of an overhead necessary for the control and addressing of the unit through the data switch and of the actual information. Typically the size of the information unit is not fixed but depends upon the message and the amount of information to be transferred.
Early packet switches handled the variable length packets as a whole unit, allocating all its communication resource to the transfer of the packet until its completion. There are a number of new packet switch designs emerging that switch only small fixed length slots. These switches are commonly referred to as Fast Packet Switches. Such switches are an improvement since they are generally simpler, may operate at higher speeds and allow for the support of real-time traffic.
If the Fast Packet Switch is to carry packet communications of variable length then it is necessary that the original packet message be segmented for transmission over the switch and reassembled at the destination. The segmentation function is relatively simple only requiring that the message be divided into units of size equal to or smaller than the slot size. The transmission of the segments over the packet switch however requires much more since it is necessary that the destination can receive and order all of the segments of the message. Thus it is required that there be a logical association between all of the slots of a single message. The reassembly function then reconstructs the original variable length message from all of the received segments. Special care may need to be taken in the reassembly function to allow for the possibility that more than one message may need to be reassembled concurrently.
Some schemes have been developed to perform the segmentation and reassembly function. However, these are limited either in the efficiency of the transport in the switch or in the performance of the reassembly function. The efficiency of the transport is typically limited by the overheads that are carried on each slot. These overheads are required to route the slot to the destination and to control the reassembly of the message at the destination. An example of this is the Slotted Ring protocol where 13 bytes of overhead are required in each slot as described in I.E.E.E. 802.6 Draft Standard Proposal "Slotted Ring" Sept. 1986. The overheads in that case include addressing, sequence indication, and length indication.
The problem with the slot overhead is compounded by addressing requirements. The common address field sizes used in data communications are 16 to 48 bits. With 48 bit addressing there is an overhead of 12 bytes per slot (source and destination address) in addition to the reassembly overheads. This approach to segmentation is clearly inefficient with small (less t
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Cantoni Antonio
Newman Robert M.
Hsu Alpus H.
Safourek Benedict V.
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