Transfer control apparatus for independent transfer of data from

Details Transfer control apparatus for independent transfer of data from Transfer control apparatus for independent transfer of data from

1995-12-20

1996-10-15

Harvey, Jack B.

395308, 395840, 395847, G06F 1314, G06F 1312

Patent

active

055663060

ABSTRACT:
A data transfer control apparatus capable of continuously transferring large amounts of data without decreasing the performance of a system CPU. The data transfer control apparatus uses one or more external storage device interfaces to control transfer of data to or form such storage devices, buffer memory interfaces to control transfer of data to and from one or more buffer memory devices, other system and data processing device interfaces, and at least one arbitration unit which controls access to buffer memory data storage. The arbitration element is programmable in response to one or more stored priority values or command signals, and can alter system response to requests for data transfer without accessing the CPU. Data can be efficiently distributed to among devices, including such output devices as televisions having periodic display and non-display periods, or other display devices requiring data on an irregular basis. The result is an increase in system performance for multimedia devices, TV game machines, etc., which require the transfer of large amounts of data, and achieves more compact and lower cost systems. This approach allows the use of slower CPU's and RAM type memory elements, and does not dominate the CPU bus activity.

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