Amplifiers – With semiconductor amplifying device – Including differential amplifier
Reexamination Certificate
2001-12-03
2003-04-15
Choe, Henry (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including differential amplifier
C330S253000, C330S259000
Reexamination Certificate
active
06549074
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a transconductance amplifier suitable for a low-power LSI used in a portable radio equipment, to a filter formed in the LSI with using the transconductance amplifier, and to a transconductance amplifier tuning circuitry used for tuning a gain of the transconductance amplifier in the filter.
DESCRIPTION OF THE RELATED ART
In connection with recent wide spread of portable radio equipments, these equipments have been required to be smaller in size and lower in manufacturing cost. In order to satisfy these requirements, important is to reduce the mounting area and also the mounting cost of LSI on the portable radio equipment by using an on-chip filter in stead of a conventional filter with an outboard element. Such on-chip filter might be formed by combining transconductance amplifiers and capacitors.
A conventional transconductance amplifier used for the on-chip filter is configured by a series circuitry, connected between the voltage source and the ground, of a differential input circuit consisting of a pair of transistors for voltage-current conversion of input voltage, a drain voltage adjustment circuit for fixing the drain voltage of the pair of the transistors to a control voltage (voltage for determining the conductance Gm) applied to its control terminal, a current mirror circuit and an output stage.
According to the conventional transconductance amplifier, required is 0.2-0.3 V of the source-drain voltage of the transistors of the differential input circuit to operate these transistors at its linear response region. Also, 0.2-0.3 V is required as for a range of the control voltage of the conductance Gm and furthermore 0.5-0.6 V of the source-drain voltage of an output transistor in the current mirror circuit is required to saturate the output transistor so as to sufficiently increase the output impedance. Therefore, in order to secure an output dynamic range of 0.4-0.5 V or more, it is necessary to keep the source voltage VDD at 1.5 V or more.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a transconductance amplifier which can be operated at a lower source voltage such as 1 V or less for example with keeping a sufficiently high output impedance and a sufficiently wide output dynamic range, to provide a filter using the transconductance amplifier and to provide a transconductance amplifier tuning circuitry for tuning a gain of the transconductance amplifier in the filter.
Another object of the present invention is to provide a small power transconductance amplifier tuning circuitry using the transconductance amplifier.
According to the present invention, a transconductance amplifier has an input stage and an output stage. The input stage includes a differential input circuit for converting a differential voltage signal applied thereto into a differential current signal, a first pair of regulated cascode circuits for adjusting output voltages of the differential input circuit depending upon a control voltage applied thereto, and an input section of a pair of current mirror circuits for mirroring the differential current signal from the differential input circuit. The differential input circuit, the first pair of regulated cascode circuits, and the input section of the pair of current mirror circuits are connected in series with each other between a voltage source and a ground. The output stage includes an output section of the pair of current mirror circuits, a differential current source circuit, a second pair of regulated cascode circuits for keeping output voltages of the current mirror circuit to a first bias voltage applied thereto, a third pair of regulated cascode circuits for keeping output voltages of the differential current source circuit to a second bias voltage applied thereto, output terminals of the third pair of regulated cascode circuits being connected to output terminals of the second pair of regulated cascode circuits, and a pair of amplifier output terminals connected to the output terminals of the second and third pairs of regulated cascode circuits. The output section of the pair of current mirror circuits, the second and third pairs of regulated cascode circuits and the differential current source circuit are connected in series with each other between the voltage source and the ground.
The input stage for adjusting the gain or conductance Gm depending upon the control voltage applied and the output stage for securing a sufficiently high output impedance and a sufficiently wide output dynamic range are connected between the voltage source and the ground in parallel with each other. Thus, the gain can be adjusted over a wider range even if the source voltage is lower than the conventional one, for example at 1 V or less. Also, a sufficiently high output impedance and a sufficiently wide output dynamic range can be expected at the lower source voltage.
It is preferred that the transconductance amplifier further includes a feedback circuit for common-mode noise suppression. This feedback circuit controls, depending upon common-mode noise applied to the transconductance amplifier, output voltages at the pair of amplifier output terminals to a predetermined voltage.
In this case, it is more preferred that the differential current source circuit controls currents flowing through the second and third pairs of regulated cascode circuits depending upon a feedback signal provided from the feedback circuit.
It is also preferred that the differential input circuit consists of two enhancement MOS transistors with a low threshold voltage, for receiving the differential voltage signal applied thereto, respectively. In this case, more preferably, the low threshold voltage of the enhancement MOS transistors is less than 0.2 V. As a consequence of this configuration, the source voltage can be more lowered.
It is preferred that the differential input circuit consists of two depletion MOS transistors for receiving the differential voltage signal applied thereto, respectively. As a consequence of this configuration, the source voltage can be further lowered.
It is also preferred that the differential input circuit consists of first and second transistors with gates connected respectively to first and second amplifier input terminals and with sources connected together to the ground or the voltage source.
It is preferred that each pair of the first, second and third pairs of regulated cascode circuit consists of an operational amplifier and a transistor with a gate connected to an output terminal of the operational amplifier.
It is also preferred that the first pair of regulated cascode circuits consist of third and fourth transistors with sources connected respectively to output terminals of the differential input circuit, a first operational amplifier with a non-inverting input terminal connected to a control terminal which receives the control voltage for controlling a conductance Gm, with an inverting input terminal connected to a source of the third transistor and with an output terminal connected to a gate of the third transistor, and a second operational amplifier with a non-inverting input terminal connected to the control terminal, with an inverting input terminal connected to a source of the fourth transistor and with an output terminal connected to a gate of the fourth transistor.
It is further preferred that the second pair of regulated cascode circuits consist of ninth and tenth transistors with sources connected respectively to output terminals of the current mirror circuit, a third operational amplifier with a non-inverting input terminal connected to a first bias terminal, with an inverting input terminal connected to a source of the ninth transistor and with an output terminal connected to a gate of the ninth transistor, and a fourth operational amplifier with a non-inverting input terminal connected to the first bias terminal, with an inverting input terminal connected to a source of the tenth transistor and with an output terminal connected to a gate of the
Tsukahara Tsuneo
Ugajin Mamoru
Armstrong Westerman & Hattori, LLP.
Choe Henry
Nippon Telegraph and Telephone Corporation
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