Transceiver circuit transmitting/receiving a tenary pulse...

Pulse or digital communications – Transceivers

Reexamination Certificate

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Details

C375S258000, C455S073000

Reexamination Certificate

active

06603805

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a transceiver circuit for use in a communication system which communicates data through a wired transmission line.
2. Description of the Related Art
With recent advancement of digitization in information communication networks, the operation of ISDN (Integrated Services Digital Network) has been inaugurated in order to provide integration of a variety of services.
FIG. 1
illustrates a form of such an ISDN-based communication system.
It should be noted that while
FIG. 1
illustrates an ISDN station
300
for centrally governing the communication system, and only one terminal
10
as an ISDN subscriber's terminal, a number of terminals
10
corresponding to the number of subscribers are actually connected to the single ISDN station
300
.
The terminal
10
comprises an ISDN non-standard terminal device
1
as a so-called TE
2
, which may include, for example, a telephone, a facsimile, a personal computer or the like; a terminal adaptor (TA)
12
for converting an interface; and a network termination device
13
as NT
1
. The ISDN station
300
, on the other hand, comprises a transceiver circuit
300
; a data modulator/demodulator circuit
31
; and a data exchanger
32
.
For communicating desired information data from the terminal
10
to another terminal
10
, the ISDN non-standard terminal device
11
first supplies the network termination device
13
with the information data and a destination signal indicative of a circuit of a destination through the TA
12
. The network termination device
13
applies a predetermined modulation to the information data and destination signal, converts the modulated information data and destination signal to a ternary pulse signal for balanced transmission, and sends the ternary pulse signal onto balanced transmission lines L
1
, L
2
comprised of two lines.
The transceiver circuit
30
of the ISDN station
300
receives the ternary pulse signal transmitted thereto through the balanced transmission lines L
1
, L
2
, and supplies the received signal J to the data modulator/demodulator circuit
31
. The data modulator/demodulator circuit
31
applies predetermined demodulation processing to the received signal J to recover the original information data and destination signal which are then supplied to the data exchanger
32
. A system composed of these balanced transmission lines L
1
, L
2
, transceiver circuit
30
and data modulator/demodulator circuit
31
defines one circuit. In other words, the ISDN station
300
is provided with a number of the transceiver circuits
30
and the data modulator/demodulator circuits
31
equal to the number of circuits possessed thereby.
The data exchanger
32
of the ISDN
300
supplies the information data only to a particular data modulator/demodulator circuit
31
associated with a circuit indicated by the destination signal supplied from the data modulator/demodulator circuit
31
so as to establish a communication through the circuit. The data modulator/demodulator circuit
31
, upon receiving the information data, applies predetermined modulation processing to the information data to produce modulated information data MD which is then supplied to the transceiver circuit
30
. The transceiver circuit
30
converts the modulated information data MD to a ternary signal for balanced transmission, and transmits the ternary signal to a desired destination through the balanced transmission lines L
1
, L
2
.
In a conventional transceiver circuit as mentioned above, relatively large discrete devices having a high current supply capability must be employed for transistors connected to a winding for transmission because of the need for transmitting pulse signals, which carry information data, through balanced transmission lines to a terminal located at a relatively remote site. The employment of larger transistors in the transceiver circuit results in a problem that a correspondingly larger area is required for mounting the transceiver circuit itself.
OBJECT AND SUMMARY OF THE INVENTION
The present invention has been made to solve the problem mentioned above, and an object the invention is to provide a half-matching type transceiver circuit which requires a smaller mounting area.
The present invention provides a transceiver circuit for transmitting or receiving a ternary pulse signal carrying information data through two balanced transmission lines, comprising: a coupling transformer having a primary winding with one end and the other end thereof connected to the balanced transmission lines; a first tristate buffer having an output terminal thereof connected to one end of a secondary winding of the coupling transformer; a second tristate buffer having an output terminal thereof connected to the other end of the secondary winding of the coupling transformer; and a transmission/reception driving control circuit responsive to the information data to be transmitted for intermittently generating a first driving pulse signal having a predetermined high potential to supply the first driving pulse signal to an input terminal of the first tristate buffer, while intermittently generating a second driving pulse signal having the high potential at a timing different from the first driving pulse signal to supply the second driving pulse signal to an input terminal of the second tristate buffer, and further for controlling the first tristate buffer and the second tristate buffer such that the first tristate buffer and the second tristate buffer are enabled only at a timing at which the first driving pulse signal or the second driving pulse signal is generated.
In the present invention, the coupling transformer has the primary winding with one end and the other end connected to balanced transmission lines, and the secondary winding with one end and the other end connected to the output terminals of the first and second tristate buffers, respectively. These tristate buffers are supplied at their respective input terminals with a high potential driving pulse signal corresponding to information data to generate a ternary transmission pulse signal on the balanced transmission lines. Thus, since a half-matching type transceiver circuit can be realized without employing discrete parts, an area required for mounting the transceiver circuit can be reduced.


REFERENCES:
patent: 6466613 (2002-10-01), Raphaeli et al.
patent: 10374502 (2000-07-01), None

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