Transaction processing systems

Electrical computers and digital processing systems: multicomput – Computer-to-computer direct memory accessing

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

Reexamination Certificate

active

07912914

ABSTRACT:
A banking, retail or other transaction network can comprise a number of terminals, for example an ATM, where each terminal comprises a plurality of peripheral devices such as a user interface, card reader, receipt printer and cash dispenser. The applications software for the peripheral devices can be held in a central server located externally of the terminal and linked to the terminal through a communications link. The link can extend to the individual peripheral devices so that they are direct clients of the server. Additionally the individual peripheral devices can be connected to each other over the link to enable them to communicate directly with each other on a peer-to-peer basis. Each peripheral can have an independent control application. In use, the independent control applications may communicate with each other so that a peripheral operates in response to a signal generated by another peripheral. A peripheral for use in such a terminal, and a network of such terminals are also described. A mainframe or server computer accessing a banking or other information database (e.g., a legacy host) can be connected to the central server through an information signal connection.

REFERENCES:
patent: 4179735 (1979-12-01), Lodi
patent: 4621326 (1986-11-01), Rawlins
patent: 4636947 (1987-01-01), Ward
patent: 4660168 (1987-04-01), Grant et al.
patent: 4775931 (1988-10-01), Dickie et al.
patent: 4917792 (1990-04-01), Murakami
patent: 4922419 (1990-05-01), Ohashi et al.
patent: 5274795 (1993-12-01), Vachon
patent: 5323393 (1994-06-01), Barrett et al.
patent: 5408624 (1995-04-01), Raasch et al.
patent: 5537626 (1996-07-01), Kraslavsky et al.
patent: 5553083 (1996-09-01), Miller
patent: 5659801 (1997-08-01), Kopsaftis
patent: 5673385 (1997-09-01), Mack et al.
patent: 5727184 (1998-03-01), Richter et al.
patent: 5737585 (1998-04-01), Kaneshima
patent: 6070194 (2000-05-01), Yu et al.
patent: 6112259 (2000-08-01), Marsanne et al.
patent: 6195694 (2001-02-01), Chen et al.
patent: 6196456 (2001-03-01), Taylor
patent: 6269473 (2001-07-01), Freed et al.
patent: 6512760 (2003-01-01), Chen
patent: 6691150 (2004-02-01), Yoshino et al.
patent: 0 602 787 (1994-06-01), None
patent: 10 105503 (1998-04-01), None
patent: WO 9602034 (1996-01-01), None
Method for Atomic Peer-to-Peer Communication on a Peripheral Component Interconnect Bus, IBM Technical Disclosure Bulletin, vol. 39, No. 1, Jan. 1996, pp. 339-351.
M.W. Sachs et al., “Fibre Channel and Related Standards,” IEEE Communications Magazine, Aug. 1996, pp. 40-50.
M.W. Sachs et al., “LAN and I/O Convergence: A Survey of the Issues,” Computer, Dec. 1994, pp. 24-32.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Transaction processing systems does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Transaction processing systems, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Transaction processing systems will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2648056

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.