Trailing bit anticipator

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Details

36471504, 36474805, G06F 738, G06F 700

Patent

active

057544581

ABSTRACT:
A method and apparatus for determining the trailing bit position from a two operand addition is described. The determination of the trailing bit occurs in parallel with the addition. The two operands are encoded together and the encoded word used to determine the trailing bit position. As the operations of encoding the operands and operating upon the encoded operands require no more time than known methods to determine the trailing bit position after the addition is completed, and as the encoding and operating on the encoded words occurs in parallel with the addition operation, the present invention allows faster processing in the floating point unit.

REFERENCES:
patent: 4431928 (1984-02-01), Skokan
patent: 4598385 (1986-07-01), Kessels et al.
patent: 4933897 (1990-06-01), Shankar et al.
patent: 5157673 (1992-10-01), Feldbrugge
patent: 5555428 (1996-09-01), Radigan et al.
patent: 5606564 (1997-02-01), Ho et al.
patent: 5630048 (1997-05-01), LaJoie et al.
patent: 5640508 (1997-06-01), Fujiwara et al.

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