Coded data generation or conversion – Analog to or from digital conversion – Digital to analog conversion
Reexamination Certificate
2000-05-25
2002-07-09
Jeanpierre, Peguy (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Digital to analog conversion
C341S143000
Reexamination Certificate
active
06417793
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to the field of digital-to-analog converters (DACs), and particularly to circuits and methods for improving the dynamic linearity of switched current source DACs.
2. Description of the Related Art
Demand for high speed/high resolution DACs continues to grow, driven primarily by strong growth in the markets for wired and wireless communications. One architecture which has been used to construct high speed/high resolution DACs employs an array of current sources: the DAC receives a digital input word which represents a desired output current, and the current sources are selectively switched to an output to provide the desired output current. Such DACs have been favored for high speed and high resolution applications due to their ability to drive a resistive load directly, without the need for a voltage buffer.
Unfortunately, these “switched current source” DACs have a serious drawback: when the digital input word changes, some or all of the DAC's internal current sources switch in response, which, due to parasitics and possible skew in the switching action, gives rise to dynamic nonlinearities and transient errors that degrade the DAC's dynamic linearity—commonly quantified with a spurious free dynamic range (SFDR) specification.
Several methods have been employed to improve the dynamic linearity of switched current source DACs. One such method is described in U.S. Pat. No. 5,646,620, in which a bipolar transistor switches the DAC output current to ground while its current sources are in transition. However, this technique is only used with a DAC having a single-ended output. Furthermore, the resistance of the bipolar transistor switch when on is well above zero ohms, limiting the degree to which the output can be attenuated and thereby permitting some of the switching glitches to pass through to the output.
Another approach is discussed in U.S. Pat. No. 5,614,903, which describes a track-and-reset diode bridge switch connected to the output of a DAC. However, this technique provides a means for attenuating the DAC's output voltages, and is thus suited for use with voltage-mode DACs only. The amount of attenuation this approach can provide is also inherently limited, due to the resistances of the diode bridge switch components.
SUMMARY OF THE INVENTION
A track and attenuate (T/A) circuit and method for use with switched current source DACs is presented, which significantly improves the dynamic linearity of such DACs.
The present invention is applicable to switched current source DACs which produce a differential output current. The T/A circuit is connected across the DAC's differential outputs and includes three attenuate switches: first and second single-ended switches which connect the positive and negative sides of the differential output, respectively, to signal ground, and a third differential switch which connects the positive and negative output lines together.
The three attenuate switches are closed during a portion of each cycle of the DAC's sample clock, to attenuate the DAC output while the outputs of the switched current sources are settling—thereby preventing dynamic nonlinearities that result from switching the current sources from being introduced into the differential output current. When properly sized, the three attenuate switches (when closed) reduce the differential output current to near zero and lower the common mode voltage between the output lines. If necessary, a low pass filter may be used to filter the differential output current to reduce the magnitude of clock frequency spurs introduced into the output spectrum by the T/A circuit.
Further features and advantages of the invention will be apparent to those skilled in the art from the following detailed description, taken together with the accompanying drawings.
REFERENCES:
patent: 5606320 (1997-02-01), Kleks
patent: 5614903 (1997-03-01), Oyama
patent: 5646620 (1997-07-01), Regler
patent: 5796286 (1998-08-01), Otaka
patent: 6069866 (2000-05-01), Pietruszynski et al.
patent: 6141169 (2000-10-01), Pietruszynski et al.
Bugeja Alex R.
Song Bang-Sup
Jeanpierre Peguy
Koppel, Jacobs Patrick & Heybl
Lauture Joseph
Rockwell Technologies LLC
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