Track-and-hold circuit

Details Track-and-hold circuit Track-and-hold circuit

1999-11-03

2001-07-03

Tran, Toan (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific signal discriminating without subsequent control

By amplitude

C327S091000

Reexamination Certificate

active

06255865

ABSTRACT:

FIELD OF THE INVENTION
The present invention pertains to the field of electronic signal conversion. More particularly, the present invention relates to the ability to more accurately track, sample, and hold a signal for analog-to-digital conversion.
BACKGROUND OF THE INVENTION
A/Ds are ubiquitous and used in a variety of applications, such as, medical equipment, audio equipment, test and measurement equipment, telecommunications, military applications. imaging and video applications, etc. Many of these applications may benefit from an improved A/D converter.
In many applications a need exists for a high-speed, high-resolution front end for analog-to-digital (A/D) converters. An A/D converter takes a finite amount of time to generate a digital output representing the analog input signal strength. Generally, the higher the resolution of the A/D, the longer the conversion time. If during this conversion time the input signal changes, then the digital output may not accurately represent the input signal. Thus, for high-speed signals that change rapidly, or for high-resolution conversion, and for the combination where the signal is high-speed and high-resolution is needed, what is desirable is a way to rapidly and accurately “sample” or “track” the analog input and “hold” it steady while the A/D conversion takes place. In this way, further changes in the high-speed signal do not affect the A/D, because the input signal has been “captured.” Additionally, if the input signal that was “captured” is very close in amplitude to the actual input signal and does not degrade during the A/D conversion time, that is, it is held steady, then the A/D may perform a high-resolution measurement. The circuit that performs this function is often referred to as a “sample-and-hold” circuit or a “track-and-hold” circuit. A track-and-hold circuit is generally placed between the input signal source and the digital portion of the A/D converter, and is often considered the “front-end” of an A/D converter, because it performs the analog function of tracking and holding the analog input for digital conversion.
Because the track-and-hold analog “front-end” is, in many applications, the limiting factor for speed and/or resolution, much engineering attention has been directed to how to improve and/or correct for track-and-hold inaccuracies. Approaches have concentrated on virtually every component in the track-and-hold circuit. Parameters that have been focused on include such things as the offset voltage of the input circuitry, gain errors of the input circuitry, gain linearity of the input circuitry, large and small signal bandwidth of the input circuitry, as well as the slew rate of tracking, aperture delays, aperture jitter or uncertainty, and charge transfer or charge injection. The “holding” element, conventionally a capacitor, has also been the subject of much investigation with examination of such things as leakage current, droop rate, etc.
In spite of the immense engineering efforts on all facets of the A/D speed and/or resolution issue, the current approaches still suffer limitations. These limitations as noted above are primarily in analog front-end track-and-hold circuit. One of the limitations that has persisted is the inherent nonlinearity of the sampling device that is used in a track-and-hold circuit. Analysis of this nonlinearity indicates that one of the factors is related to the range of the amplitude of the input signal. For lowered track-and-hold nonlinearities, generally, the input signal amplitude should be minimized. On the other hand, for higher resolution and/or dynamic range, generally, the desire is to handle a wide range of input voltage amplitudes from small to large. Thus, there are conflicting requirements.
A conventional track-and-hold approach is shown in the simplified circuit diagram of FIG.
1
. In
FIG. 1
, the metal-oxide-semiconductor (MOS) transistor M1
106
is turned on and off by the voltage applied to its gate Vg
114
. The transistor M1
106
is often referred to as the input switch or the sampling switch. The size of the sampling capacitor Cs
112
is dictated by the resolution of the analog-to-digital (A/D) converter (number of bits=N) and the fundamental thermal noise given by equation (1).
(
V
S
)
n
2
=
kT
C
S
(
1
)
In equation (1), Vs denotes the noise voltage of the source, Cs is the sampling capacitor capacitance, k is Boltzman's constant, and T represents the temperature in degrees Kelvin.
In practical applications, the size of the sampling capacitor Cs
112
needs to be even larger, because of other noise sources (from the active devices) contributing to the total noise.
For high speed A/D converters, the major source of distortion comes from nonlinearities in the front-end track-and-hold. For the circuit in
FIG. 1
, the ON resistance of the transistor M1
106
is modulated by the input voltage level as given by equation (2).
R
ON
=
1
k
1
·
W
L
·
(
V
g
-
V
i
⁢
 
⁢
n
-
V
th
)
(
2
)
In equation (2), RON denotes the sampling transistor ON resistance, k
1
is technology dependent constant related to charge carrier mobility, W/L is the sampling transistor gate width divided by the sampling transistor gate length, Vg is the gate voltage, Vin is the input signal voltage, and Vth is the threshold voltage of the sampling transistor.
In order to keep the distortion of the front-end at the N-bit level, the total variation of the RC time constant should be less than equation (3).
Δ
⁡
(
R
ON
⁢
C
S
)
=
1
F
i
⁢
 
⁢
n
·
2
N
(
3
)
In equation (3), RON denotes the sampling transistor ON resistance, Cs is the sampling capacitor capacitance, F
in
is the maximum input signal frequency, and N denotes the A/D converter resolution in number of bits. Since the capacitor size is fixed and determined by noise considerations, the ON resistance of the input switch M1
106
should have a minimal variation over the whole input voltage range in order to minimize distortion.
A straightforward implementation of the input switch M1
106
, as shown in
FIG. 1
, uses a transistor with an extremely large width to length (W/L) ratio. Such a transistor will also have large parasitic capacitors from the source and drain junctions, Csb
108
and Cdb
110
, respectively. These parasitic capacitors (Csb
108
and Cdb
110
) have a strong voltage dependence, so together with the signal source impedance Rs
104
(on the order of 50 ohms), they create a distorting nonlinear filter. Moreover, the amount of distortion is directly affected by the signal source impedance.
Thus, in many applications a need exists for a high-speed, high-resolution front end for analog-to-digital (A/D) converters. In particular, it is advantageous in an A/D system to have the input track-and-hold circuit as accurate as possible over a wide range of input signal amplitudes while at the same time having the track-and-hold circuit introduce as few of its own artifacts as possible. In this way, the A/D can achieve better resolution with lowered nonlinearities.
Therefore, it is desirable to provide a track-and-hold circuit having high speed and lowered nonlinearities.
SUMMARY OF THE INVENTION
The present invention includes a method and apparatus for a track-and-hold circuit having improved input signal tracking and reduced nonlinearities. An input signal is presented to a sampling device for sampling the input signal and at the same time the input signal is presented to a control circuit. The control circuit controls the sampling device to reduce nonlinearities during sampling.
Other features of the present invention will be apparent from the accompanying drawings and from the detailed description that follows.


REFERENCES:
patent: 3633091 (1972-01-01), Bowers
patent: 4531095 (1985-07-01), Ishigaki et al.
patent: 5872469 (1999-02-01), Nestler
patent: 5896050 (1999-04-01), Shinohara et al.

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