Track and hold circuit

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307257, 307353, H03K 1774, G11C 2702

Patent

active

045189218

ABSTRACT:
A track and hold circuit comprising an electronic switch and a signal storing device. During a tracking interval, the switch couples a varying input signal from an input node to the storing device in response to at least one track control signal. In a holding interval, the switch isolates the input node in response to at least one hold control signal. An input-signal-independent and substantially constant track-to-hold offset is provided by the use of selected track and hold control signals. Specifically, the track and hold control signals respectively vary with input signal during each tracking and each holding interval and have a substantially constant difference therebetween. In the disclosed embodiments, the track and hold circuit can be easily modified to reduce the effects of feedthrough and droop.

REFERENCES:
patent: 3052851 (1962-09-01), Heberling
patent: 3075086 (1963-01-01), Mussard
patent: 3308386 (1967-03-01), Wong
patent: 3389272 (1968-06-01), Cherry
patent: 3480795 (1969-11-01), Benson et al.
patent: 3596191 (1971-07-01), Stuckert
patent: 3600677 (1971-08-01), Uchida
patent: 3628161 (1971-12-01), Earp
patent: 3659117 (1972-04-01), Caveney et al.
patent: 3721829 (1973-03-01), Benson
patent: 3851260 (1974-11-01), Colin
G. Erdi et al, "A Precision FET-Less Sample-and-Hold with High Charge-to-Droop Current Ratio", IEEE J. Solid-State Circuits, vol. SC13, pp. 235-243, Dec. 1978.

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