Track and hold amplifier

Details Track and hold amplifier Track and hold amplifier

2001-03-27

2002-12-03

Cunningham, Terry D. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific signal discriminating without subsequent control

By amplitude

C327S095000

Reexamination Certificate

active

06489814

ABSTRACT:

BACKGROUND OF THE INVENTION
This invention relates to a track and hold amplifier comprising an input buffer for receiving an input signal and for transferring the received input signal to a first terminal of a pn-junction switch having a second terminal connected to a hold capacitor, and means to supply a switching signal to said first terminal of the pn-junction switch for translating the buffered input signal through the switching pn-junction to the hold capacitor during a track mode and for blocking this transfer during a hold mode. A track and hold amplifier of this kind is known from the article “A 12-
b
, 60-Msample/s Cascaded Folding and Interpolating ADC”, by P. Vorenkemp and R. Rovers in IEEE
Journal of Solid State Circuits
, Vol 32, No 12, December 1997, Pages 1874-1886.
A track and hold amplifier is often used in the input of an analog to digital converter to separate the sampling operation from the quantization operation. Present day multistep AD-architecture has a number of comparators, which do not operate simultaneously. However, it is necessary that all the comparators see the same analog signal value. The function of the track and hold amplifier is to determine the voltage level of the input signal at the sampling instant of the track and hold amplifier, and to maintain this value during a certain time period, so as to ensure that all comparators see the same analog input value. Moreover, each comparator has input capacitance which causes the input signal level to be compared to reach its correct level only after some delay. Therefore, without a track and hold amplifier, the comparator would compare an incorrect signal level, especially at higher signal frequencies. The track and hold amplifier samples the input signal at the correct value and maintains this value during the hold mode, so that the comparator-input has enough time to reach its correct signal level for subsequent quantization.
A drawback of the abovementioned prior art track and hold amplifier is that during the track mode larger currents flow into the hold capacitor, especially at higher signal frequencies. These larger currents flow into the holding capacitance through the pn-junction switch. This results in large non linear signal distortion and consequently in incorrect signal sampling. The signal distortion, caused by the pn-junction, may easily reach values of some tens of millivolts, which is too large for modem applications, where the total signal amplitude is not more than 1 Volt.
SUMMARY OF THE INVENTION
The present invention has it for its objects to overcome this drawback of the prior art track and hold amplifier. The track and hold amplifier of the present invention is therefore characterized by a feedback connection from the second terminal of the pn-junction switch to the input buffer and means to enable the feedback during the track mode and to disable the feedback during the hold mode. The feedback from the second terminal of the pn-junction switch to the input buffer reduces the signal distortion to the first terminal of the pn-junction switch, where it does no harm. However, this feedback has a detrimental effect on the hold feedthrough of the amplifier because the input signal could reach the holding capacitance through this feedback path. Therefore the feedback is disabled during the hold mode. The feedback may for instance be disabled during the hold mode by cutting off the current through the input buffer. The however has, inter alia, the drawback that the input impedance of the amplifier varies with the track and hold switching signal. A preferred arrangement according to the invention is therefore characterized in that said means to enable the feedback during the track mode and to disable the feedback during the hold mode comprises a second pn-junction switch within said feedback connection and second means to supply the switching signal to the second pn-junction switch.
The said second means to supply the switching signal to the second pn-junction switch may cause a large voltage jump on the part of the feedback connection between the input buffer and the second pn-junction switch. This voltage jump may cause interference of the voltage of the hold capacitor through the junction capacitance of the second pn-junction switch. It is a further object of the invention to limit this interference and the track and hold amplifier of the invention may be further characterized by clamping means connected to the part of the feedback connection between the input buffer and the second pn-junction switch.
It is another object of the invention to provide a track and hold amplifier which is characterized by resistive means between the second terminal of the first pn-junction switch and the hold capacitor for increasing the stability of the feedback path.


REFERENCES:
patent: 4806790 (1989-02-01), Sone
patent: 5047666 (1991-09-01), Astegher et al.
patent: 5457418 (1995-10-01), Chang
patent: 5583459 (1996-12-01), Sone
patent: 5801555 (1998-09-01), Kwon
patent: 6028459 (2000-02-01), Birdsall et al.
patent: 6323700 (2001-11-01), Hoogzaad
“A 12-b, 60-Msample/s Cascaded Folding and Interpolating ADC”, by Pieter Vorenkamp et al., IEEE Journal of Solid State Circuits, vol. 32, No. 12, Dec. 1997, pp. 1876-1886.

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