Trace control circuit in emulation system

Details Trace control circuit in emulation system Trace control circuit in emulation system

1996-05-24

1998-02-03

Teska, Kevin J.

39518321, 395568, G06F 1130

Patent

active

057154350

ABSTRACT:
In a trace control circuit for an emulation system, a program fetch signal is generated on the basis of a CPU read signal and a CPU program fetch status signal, both generated from the CPU included in the trace control circuit, and then, is thinned out at an arbitrary proportion so as to generate a trace memory write signal to a trace memory, so that a trace imformation outputted from the CPU is stored in a trace memory in response to the trace memory write signal thus generated. Accordingly, the memory capacity of the trace memory can be apparently increased.

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Meusel, et al., "Softwareanalyse mit Logikanalysesystem LAS 20", Radio Fernsehen Elektronik, vol. 35, No. 2, Feb. 1986, Berlin, DE, pp. 71-74.
IBM Technical Disclosure Bulletin, vol. 34, No. 7A, Dec. 1991, NY, pp. 467-469, "Bus monitor using DRAM interface for a Harvard-style computer architecture".
Richter, "Software analyse am i8086", Nacrichten Technik Elektronik, vol. 40, No. 7, 1990, Berlin, DE, pp. 258-261.

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