Metal working – Barrier layer or semiconductor device making
Reexamination Certificate
1999-10-13
2002-03-19
Graybill, David E. (Department: 2814)
Metal working
Barrier layer or semiconductor device making
C118S062000, C117S901000
Reexamination Certificate
active
06358288
ABSTRACT:
BACKGROUND OF THE INVENTION
The invention relates generally to a nozzle device, and more particularly, to an apparatus and method for holding and securing a spherical-shaped device.
Conventional integrated circuits, or “chips,” are formed from a flat surface semiconductor wafer. The semiconductor wafer is first manufactured in a semiconductor material manufacturing facility and is then provided to a fabrication facility. At the latter facility, several layers are processed onto the semiconductor wafer surface. Once completed, the wafer is then cut into one or more chips and assembled into packages. Although the processed chip includes several layers fabricated thereon, the chip still remains relatively flat.
A fabrication facility is relatively expensive due to the enormous effort and expense required for creating flat silicon wafers and chips. For example, manufacturing the wafers requires several high-precision steps including creating rod-form polycrystalline semiconductor material; precisely cutting ingots from the semiconductor rods; cleaning and drying the cut ingots; manufacturing a large single crystal from the ingots by melting them in a quartz crucible; grinding, etching, and cleaning the surface of the crystal; cutting, lapping and polishing wafers from the crystal; and heat processing the wafers. Moreover, the wafers produced by the above processes typically have many defects which are largely attributable to the difficulty in making a single, highly pure crystal due to the above cutting, grinding and cleaning processes as well as due to the impurities, including oxygen, associated with containers used in forming the crystals. These defects become more and more prevalent as the integrated circuits formed on these wafers become smaller.
Another major problem associated with modern fabrication facilities for flat chips is that they require extensive and expensive equipment. For example, dust-free clean rooms and temperature-controlled manufacturing and storage areas are necessary to prevent the wafers and chips from defecting and warping. Also, these types of fabrication facilities suffer from a relatively inefficient throughput as well as an inefficient use of the silicon. For example, facilities using in-batch manufacturing, where the wafers are processed by lots, must maintain huge inventories to efficiently utilize all the equipment of the facility. Also, because the wafers are round, and the completed chips are rectangular, the peripheral portion of each wafer cannot be used.
Still another problem associated with modern fabrication facilities is that they do not produce chips that are ready to use. Instead, there are many additional steps that must be completed, including cutting and separating the chip from the wafer; assembling the chip to a lead frame which includes wire bonding, plastic or ceramic molding and cutting and forming the leads, positioning the assembled chip onto a printed circuit board; and mounting the assembled chip to the printed circuit board. The cutting and assembly steps introduce many errors and defects due to the precise requirements of such operations. In addition, the positioning and mounting steps are naturally two-dimensional in character, and therefore do not support curved or three dimensional areas.
Therefore, due to these and various other problems, only a few companies in the world today can successfully manufacture conventional flat chips. Furthermore, the chips must bear a high price to cover the costs of manufacturing, as well as the return on initial capital and investment.
In U.S. Pat. No. 5,955,776 filed on May 16, 1997, assigned to the same assignee as the present application and hereby incorporated by reference, a method and apparatus for manufacturing spherical-shaped semiconductor integrated circuits is disclosed. The present invention is specific to an apparatus and method for securing the circuits to facilitate the performance of different fabrication steps, while not specifically contacting the circuits.
SUMMARY OF THE INVENTION
The present invention, accordingly, provides an apparatus and method for securing a device, such as a spherical shaped semiconductor integrated circuit, for fabrication. To this end, the apparatus includes a plenum having an input and several outputs. The input of the plenum is connected to a pressurized fluid source. The outputs are separated into two groups: one or more centralized outputs and several peripheral outputs. The outputs connect to a plurality of apertures located on a top surface of the apparatus.
The centralized apertures expel the pressurized fluid from the fluid source to suspend the spherical shaped semiconductor integrated circuit device above the top surface. In one embodiment, the peripheral apertures expel the pressurized fluid from the fluid source at a velocity that is greater than that of the fluid from the centralized apertures. The high-velocity fluid thereby secures the device above the centralized apertures. In another embodiment, the expelled fluids from the peripheral apertures do not contact the device, unless the device were to move away from its desired position over the centralized apertures.
Several advantages result from the foregoing. For one, the spherical shaped semiconductor integrated circuit device is held securely by the expelled fluids so that it can receive processing operation thereon. Also, no physical contact is made on the device during processing. Further, the method of the present invention can be carried out in a relatively small space and helps to eliminate the requirements for large clean room facilities.
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Kasim Ramesh K.
Ramamurthi Ram
Ball Semiconductor Inc.
Graybill David E.
Haynes and Boone LLP
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