1995-12-05
1998-03-10
Sheikh, Ayaz R.
395312, G06F 1300
Patent
active
057271739
ABSTRACT:
A bus transceiver system transfers data among a plurality (N) of system components. The system includes N toggle bus transceiver circuits (TBT.sub.i, for i=0 through N-1), each of which corresponds to a respective one of the system components. Each toggle bus transceiver circuit has bi-directional driver circuitry which has M first terminals (D.sub.i,j, for j=0 through M-1). Each of the M first terminals are coupled to a respective bit of the system component to which that toggle bus transceiver circuit corresponds. Each toggle bus tranceiver circuit further has M second terminals (P.sub.i,j). Driver switch circuitry of each toggle bus transceiver circuit selectively connects each of the M first terminals to at least one of said M second terminals. In a first mode, the driver circuitry drives in a first direction and in a second mode, the driver circuitry drives in a second direction. Repeater of each toggle bus transceiver circuit has M third terminals (Q.sub.i,j) and M latch circuits (L.sub.i,j). Repeater switch circuitry selectively connects each of the M third terminals to at least one of the latch circuits. In the first mode, each latch circuit latches a data signal provided at the third terminal to which the latch circuit is connected, and in the second mode, the latch circuit provides a data signal latched by the latch circuit to the third terminal to which said latch circuit is connected. A permuted interconnect network couples the second terminals of the toggle bus transceiver circuit bi-directional driver circuitry to the third terminals of the toggle bus transceiver circuit repeater circuitry for permuted signal transfer therebetween.
REFERENCES:
patent: 4044333 (1977-08-01), Auspurg et al.
patent: 4472712 (1984-09-01), Ault et al.
patent: 4811210 (1989-03-01), McAullay
patent: 4882683 (1989-11-01), Rupp et al.
patent: 4958303 (1990-09-01), Assarpour et al.
patent: 5202593 (1993-04-01), Huang et al.
patent: 5218240 (1993-06-01), Camarota et al.
patent: 5313590 (1994-05-01), Taylor
patent: 5392406 (1995-02-01), Petersen et al.
patent: 5604735 (1997-02-01), Levinson et al.
Kai Hwang and Faye A. Briggs, "Computer Architecture and Parallel Processing," McGraw Hill, 1984, pp. 325-392.
Howard Jay Siegel and William Tsun-yuk Hsu (Ed. Veljko M. Milutinovic), "Computer Architecture: Concepts and Systems," North-Holland, 1988.
National Semiconductor Corporation
Sheikh Ayaz R.
LandOfFree
Toggle bus circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Toggle bus circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Toggle bus circuit will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-148751