Timing synchronizing circuit for baseband data signals

Pulse or digital communications – Spread spectrum – Direct sequence

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

328120, 375120, H04L 7033

Patent

active

049641174

ABSTRACT:
A timing synchronizing circuit with a phase locked loop. A multiplexor is employed to cause the phase locked loop to alternate between a self-excited mode for maintaining the frequency of a recovered timing signal and a mode in which state transitions of a baseband data signal are compared with the phase locked loop feedback signal to adjust the frequency of the recovered timing signal.

REFERENCES:
patent: 4180783 (1979-12-01), Khalifa
patent: 4301537 (1981-11-01), Roos
patent: 4365210 (1982-12-01), Harrington et al.
patent: 4494021 (1985-01-01), Bell et al.
patent: 4528512 (1985-07-01), Yoshida
patent: 4570125 (1986-02-01), Gibson
patent: 4580100 (1986-04-01), Suzuki et al.
patent: 4604583 (1986-08-01), Aoyagi et al.
patent: 4604756 (1986-08-01), Moustakas et al.
patent: 4607296 (1986-08-01), Smidth
patent: 4652834 (1987-03-01), McAdam
patent: 4680780 (1987-07-01), Agoston et al.
patent: 4849993 (1989-07-01), Johnson et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Timing synchronizing circuit for baseband data signals does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Timing synchronizing circuit for baseband data signals, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Timing synchronizing circuit for baseband data signals will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-855486

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.