Timing reproducer and demodulator comprising this

Details Timing reproducer and demodulator comprising this Timing reproducer and demodulator comprising this

2001-08-28

2003-11-18

Bocure, Tesfaldet (Department: 2631)

Pulse or digital communications

Synchronizers

Synchronizing the sampling time of digital data

C375S371000

Reexamination Certificate

active

06650718

ABSTRACT:

TECHNICAL FIELD
The present invention relates to a timing recovery device and a demodulator and, more particularly, to a timing recovery device and a demodulator suitable for use in a broadband digital radio communication system in which a burst signal begins with a preamble.
BACKGROUND ART
For a timing recovery device of a demodulator for a conventional broadband digital radio communication system which employs a preamble signal, there are described two schemes, for example, in literature “Carrier-Clock Simultaneous Recovery Scheme” by Nagura, Matsumoto, Kubota and Kato, The Institute of Electronics, Information and Communication Engineers, Technical Report of IEICE, RCS94-60, pp. 7-12, September 1994.
The one scheme is to estimate a timing phase from a preamble signal now widely used for OQPSK modulation. This preamble signal is a signal (of a “1101” pattern, for instance) which effects an alternate transition between two adjacent Nyquist points in a complex plane upon each occurrence of a symbol. A patent for this scheme is “Burst Signal Demodulation Circuit” (Pat. Appln. Laid-Open No. 35956/95, Inventors: Matsumoto and Kato).
The other scheme is to estimate a timing phase from a preamble signal widely used for QPSK modulation. This preamble signal is a “0&pgr;” modulation signal (of a “1001” pattern, for instance) which effects an alternate transition between two origin-symmetric Nyquist points in a complex plane upon each occurrence of a symbol. A patent for this scheme is “Burst Signal Demodulation Circuit” (Pat. Appln. Laid-Open No. 46658/96, Inventors: Nagura, Matsumoto and Kato).
According to these schemes, both of which utilize the fact that either preamble signal has a frequency component ½ that of a symbol frequency (fs), the receiver side calculates the correlation between the preamble signal and a ½ symbol frequency component exp[−j&pgr;(fs)t] output from a VCO, and estimates the timing phase from a vector angle indicated by the correlation value.
In either scheme the data sampling rate is only 2 [sample/symbol]; since this sampling rate is ½ the minimum value of the sampling rate (=4 [sample/symbol] needed in a conventional scheme which estimates the timing phase from the correlation between a nonlinearly processed signal (for example, an envelope) and a symbol frequency component exp[−j2&pgr;(fs)t] as described in, for example, literature “Signal Detecting System and Burst Demodulating Equipment” (Pat. Appln. Laid-Open No. 141048/94, Inventor: Yoshida), the reduction of the sampling rate permits reduction of the power consumption of the receiver. The above-mentioned two schemes (Pat. Appln. Laid-Open No. 235956/95 and Pat. Appln. Laid-Open No. 46658/96) will be described below in detail.
A description will be given first of a timing recovery scheme (pat. Appln. Laid-Open 235956/95) that uses the preamble (“1101” pattern) signal which effects an alternate transition between two adjacent Nyquist points in a complex plane upon each occurrence of a symbol.
FIG. 17
is a block diagram depicting the above-mentioned demodulator containing a timing recovery device. In
FIG. 17
, reference numeral
100
denotes an antenna,
200
frequency converting means,
301
and
302
A/D converters,
400
a timing recovery device, and
500
data decision means; and in the timing recovery device
400
, reference numeral
401
denotes one-symbol delay means,
402
conjugate complex multiplying means,
403
timing phase difference calculating means, and
404
a VCO.
Next, the operation of the conventional demodulator will be described. The antenna
100
receives an RF band preamble signal, and the frequency converting means
200
frequency-converts the RF band preamble signal to a base band preamble signal.
FIG. 18
is a signal space diagram of the base band preamble signal (“1101” pattern. In
FIG. 18
, reference character &thgr;c denotes the carrier phase of the received signal; the preamble signal effects an alternate transition between Nyquist points “A” and “B” in the figure upon each occurrence of a symbol. The vector angle of the Nyquist point “A” is (&thgr;c−45) (deg), and the vector angle of the Nyquist point “B” is (&thgr;c+45) [deg]; the difference between the vector angles of the Nyquist points “A” and “B” is 90 [deg].
The A/D converter
301
samples an in-phase component of the base band preamble signal at a time t=&tgr;+iT/2 (where I=1,2,3, . . . , &tgr; is a timing error (−T/2≦&tgr;<T/2) and T is a symbol period), and outputs a sampled preamble data sequence Ip
i
(where i=1,2,3, . . . ). Similarly, the A/D converter
302
samples a quadrature component of the base band preamble signal at a time t=&tgr;+iT/2, and outputs a samples preamble data sequence Qp
i
(where
1
=1,2,3, . . . ).
Therefore, it is apparent that the sampling rate is 2[sample/symbol]. The sampling is performed by the leading edge of a recovered sample clock output from the timing recovery device
400
of the following stage, and during a timing phase estimating operation no phase control of the recovered sample clock is effected.
The timing recovery device
400
uses the preamble data sequence Ip
i
(where i=1,2,3, . . . ) and the preamble data sequence Qp
i
(where i=1,2,3, . . . ) to calculate the timing error &tgr;, and exercises phase control of the recovered sample clock and a recovered symbol clock to cancel the timing error &tgr;.
The recovered symbol clock mentioned herein is a clock of the symbol period obtained by frequency dividing the recovered sample clock down to ½.
The data decision means
500
latches, by the recovered symbol clock, data at the Nyquist points from significant random data sequences Id
i
and Qd
i
(where i=1,2,3, . . . ) following the preamble after cancellation of the timing error &tgr; by the timing recovery device
400
. And the data decision means uses the latched Nyquist point data to decide data, and outputs demodulated data.
Next, the operation of the timing recovery device
400
will be described. The one-symbol delay means
401
delays the preamble data sequence Ip
i
(where i=1,2,3, . . . ) and the preamble data Qp
i
(where i=1,2,3, . . . ) by a one-symbol time interval, and the conjugate complex multiplying means
402
performs conjugate complex multiplications of the preamble data sequences (Ip
i
, Qp
i
) and one-symbol old preamble data sequences (Ip
i−2
, Qp
i−2
) by the following equations.
Id
i
=(
Ip
i
×Ip
i−2
)+(
Q
pi
×Qp
i−2
)  (1a)
Qd
i
=(
Qp
i
×Ip
i−2
)+(
I
pi
×PQi
−2
)  (1b)
By this processing, the preamble signal is differential-detected. With such processing, it is possible to obtain a preamble signal which effects an alternate transition between points “C” and “D” upon each occurrence of a symbol independently of the carrier phase &thgr;c as depicted in FIG.
19
. The phase &thgr;x(t) indicated by this preamble signal has a ½ symbol frequency component since it makes a phase transition from +90 [deg] to −90 [deg] and a phase transition from −90 [deg] to +90 [deg] alternately with one symbol period as depicted in FIG.
20
.
Then, the timing phase difference calculating means
403
calculates the correlation between the phase &thgr;x(t) and the ½ symbol frequency component exp[−j&pgr;(fs)t] output from the VCO. Concretely, letting the phases of the signals (ID
i
, QD
i
) be represented by &thgr;x
i
, the timing phase difference calculating means performs the following multiplications
MI
i
=&thgr;X
i
×cos &pgr;
i/
2  (2a)
MQ
i
=&thgr;X
i
×sin &pgr;
i/
2  (2b)
The timing phase difference calculating means averages the multiplied results (MI
i
, MQ
i
), and outputs a correlation value (&Sgr;MI,

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