Timing recovery technique

Details Timing recovery technique Timing recovery technique

1980-09-08

1983-10-18

Safourek, Benedict V.

Pulse or digital communications

Repeaters

Testing

375 80, 333 18, 364724, H04B 304

Patent

active

044110006

ABSTRACT:
In a data receiver (100), sampling circuitry (120, 125) forms samples of a received data signal representing a succession of data symbols. The samples, which are formed at twice the symbol rate, are multiplied by respective ones of a queue of coefficients in a fractionally spaced equalizer (150). Further circuitry (155, 160, 165, 170) forms decisions in response to the resulting products as to the values of the tansmitted symbols and generates error signals. The values of the coefficients are updated in the equalizer in response to the error signals. Timing recovery circuitry (230) within the equalizer periodically identifies the largest of the coefficients and either advances or retards the phase of the sampling circuitry depending on whether that coefficient is or is not within a predetermined portion of the queue. The magnitude of the amount by which the phase is advanced or retarded is determined by the position of the largest coefficient relative to the center of the coefficient queue.

REFERENCES:
patent: 3906347 (1975-09-01), Motley et al.
patent: 3978407 (1976-08-01), Forney, Jr. et al.
patent: 4004226 (1977-01-01), Qureshi et al.
patent: 4245345 (1981-01-01), Gitlin et al.
patent: 4285061 (1981-08-01), Ho
patent: 4330861 (1982-05-01), Impallomeni
Gottfried, "Fractional Tap-Spacing Equalizer and Consequences for Clock Recovery in Data Modem," Aug. 1976, IEEE Transaction on Communications, vol. Com-24, No. 8, pp. 856-864.

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