Timing recovery scheme for burst communication systems having a

Oscillators – Solid state active element oscillator – Transistors

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331 34, 331 36C, 331172, 331177V, 331DIG2, H03B 512, H03L 706

Patent

active

049184067

ABSTRACT:
A timing recovery apparatus for a burst mode communication receiver. The apparatus provides for optimum sampling and digitizing of received data at a plurality of data rates. In particular, a VCO is phase-locked to a local frequency reference prior to data being received. A reference timing preamble transmitted prior to the data is filtered and fed to the VCO causing it to injection lock such that the VCO becomes phase aligned with the preamble. The VCO is then permitted to "free run" during data transmission and continues to operate at substantially the same frequency. A synchronous divider and multiplexer, responsive to the VCO, allows selection of sampling clocks for the plurality of data rates. The divider is forced to a known state during VCO injection locking, to assure that the sampling clocks have maintained the proper phase for optimal sampling at the corresponding data rate. Further, means is provided to monitor the frequency of the VCO. Should the VCO frequency drift more than a predetermined amount an indication of such is produced.

REFERENCES:
patent: 4633195 (1986-12-01), Main

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