Timing recovery for partial-response maximum likelihood...

Details Timing recovery for partial-response maximum likelihood... Timing recovery for partial-response maximum likelihood...

2011-06-14

2011-06-14

Pascal, Robert (Department: 2817)

Oscillators

Automatic frequency stabilization using a phase or frequency...

Tuning compensation

C360S051000, C375S376000

Reexamination Certificate

active

07961054

ABSTRACT:
An embodiment of the present invention is a technique for timing recovery. A frequency acquisition loop locks a voltage controlled oscillator (VCO) clock of a multi-band VCO to a reference clock. The frequency acquisition loop generates first and second feedback clocks from the VCO clock. A data lock phase loop generates a driving signal corresponding to a phase error signal from interleaved partial response signal (PRS) samples based on the second feedback clock. The driving signal controls the multi-band VCO in a data phase lock mode. A lock detect controller detects a frequency lock condition in a frequency lock mode and a data lock condition in the data phase lock mode based on the first feedback clock and the reference clock.

REFERENCES:
patent: 6683930 (2004-01-01), Dalmia
patent: 2004/0146132 (2004-07-01), Staszewski et al.
patent: 2008/0049350 (2008-02-01), Bruner et al.
patent: 2010/0103791 (2010-04-01), Honma

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