Timing recovery for optical disc drive high frequency...

Dynamic information storage or retrieval – Control of storage or retrieval operation by a control... – Control of information signal processing channel

Reexamination Certificate

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Details

C369S053340

Reexamination Certificate

active

08050157

ABSTRACT:
A method and apparatus for recovering clock timing from a bi-phase modulated portion of a high frequency modulation (HFM) signal. The HFM signal includes signal transitions between a high level and a low level. A clock count is initiated upon detection of a first signal transition in the bi-phase modulated portion of the HFM signal. The clock count corresponds to an expected clock timing of the HFM signal. The clock count is stopped upon detection of a second signal transition in the bi-phase modulated portion of the HFM signal subsequent to the first signal transition. An actual clock count includes a number of clock cycles occurring between the first and second signal transitions based on the expected clock timing. An expected clock count between signal transitions of the bi-phase modulated portion of the HFM signal is identified if the actual clock count between the first and second signal transitions falls within a range of clock counts. The range of clock counts includes the expected clock count and a subset of clock count deviations from the first expected clock count. An error between the actual clock count and the first expected clock count is determined.

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