Timing recovery for optical disc drive high frequency...

Dynamic information storage or retrieval – Control of storage or retrieval operation by a control... – Control of information signal processing channel

Reexamination Certificate

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Details

C369S053340

Reexamination Certificate

active

08000193

ABSTRACT:
A method and apparatus for recovering clock timing from a hi-phase modulated portion of an HFM signal. The signal includes transitions between high and low levels. A clock count is initiated upon detection of a first transition, which corresponds to an expected clock timing of the signal. The count is stopped upon detection of a second transition. An actual clock count includes a number of clock cycles occurring between the transitions based on the expected timing. A first expected clock count between transitions is identified if the actual clock count between the transitions falls within a first range of clock counts. A first error between the actual and first expected clock counts is determined. A second expected clock count between transitions is identified if the actual clock count between transitions falls within a second range of clock counts. A second error between the actual expected clock counts is determined.

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patent: WO 2004/107342 (2004-12-01), None

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