Timing recovery for digital demodulation

Details Timing recovery for digital demodulation Timing recovery for digital demodulation

1994-04-11

1996-03-19

Mis, David

Demodulators

Frequency shift keying or minimum shift keying demodulator

329304, 375355, H03D 300, H04L 700

Patent

active

055006205

ABSTRACT:
A method of demodulating an oversampled digitised analogue signal F(t) wherein n samples per bit of the digitised signal represent the instantaneous frequency and/or phase of the signal. The method includes the steps of selecting a sequence of bits containing bit value transitions, determining the magnitude of F(t) within the sequence so that all the extrema are maxima (or minima), whereby the maxima (or minima) of .vertline.F(t).vertline. provide a defined timing position in relation to the bits of the sequence. The value of .vertline.F(t).vertline. over a succession of said bits is averaged and a timing control signal is derived therefrom for demodulation of the digitised analogue signal.

REFERENCES:
patent: 4334313 (1982-06-01), Gitlin et al.
patent: 4849991 (1989-07-01), Arnold et al.
patent: 4937841 (1990-06-01), Chuang et al.
patent: 4941155 (1990-07-01), Chuang et al.
patent: 5084891 (1992-01-01), Ariyavisitakul et al.

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